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74AUP3G04GT Datasheet(PDF) 10 Page - NXP Semiconductors

No. de pieza 74AUP3G04GT
Descripción Electrónicos  Low-power triple inverter
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Fabricante Electrónico  NXP [NXP Semiconductors]
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74AUP3G04GT Datasheet(HTML) 10 Page - NXP Semiconductors

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74AUP3G04_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 8 October 2009
10 of 17
NXP Semiconductors
74AUP3G04
Low-power triple inverter
[1]
For measuring enable and disable times, RL = 5 kΩ.
For measuring propagation delays, setup and hold times, and pulse width, RL =1MΩ.
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 9.
Load circuitry for switching times
001aac521
DUT
RT
VI
VO
VEXT
VCC
RL
5 k
Ω
CL
G
Table 10.
Test data
Supply voltage
Load
VEXT
VCC
CL
RL[1]
tPLH, tPHL
tPZH, tPHZ
tPZL, tPLZ
0.8 V to 3.6 V
5 pF, 10 pF, 15 pF, and 30 pF
5 k
Ω or 1 MΩ
open
GND
2VCC


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