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TPS62065DSGR Datasheet(PDF) 4 Page - Texas Instruments

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No. de pieza TPS62065DSGR
Descripción Electrónicos  3-MHz 2A Step Down Converter in 2x2 SON Package
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Fabricante Electrónico  TI [Texas Instruments]
Página de inicio  http://www.ti.com
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TPS62065DSGR Datasheet(HTML) 4 Page - Texas Instruments

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TPS62065, TPS62067
SLVS833A – MARCH 2010 – REVISED MAY 2010
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
Over full operating ambient temperature range, typical values are at TA = 25°C. Unless otherwise noted,
specifications apply for condition VIN = EN = 3.6V. External components CIN = 10mF 0603, COUT = 10mF 0603, L
= 1.0mH, see the parameter measurement information.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OSCILLATOR
fSW
Oscillator frequency
2.9 V
≤ VIN ≤ 6 V
2.6
3
3.4
MHz
OUTPUT
Vref
Reference voltage
600
mV
PWM operation, MODE = VIN ,
VFB(PWM)
Feedback voltage PWM Mode
–1.5
0
1.5
2.9 V
≤ VIN ≤ 6 V, 0 mA load
%
Feedback voltage PFM mode,
device in PFM mode, voltage positioning active(2)
VFB(PFM)
1
Voltage Positioning
Load regulation
-0.5
%/A
VFB
Line regulation
0
%/V
Activated with EN = GND, 2.9V
≤ VIN≤ 6V, 0.8 ≤
75
200
1450
R(Discharge)
Internal discharge resistor
Ω
VOUT≤ 3.6V
tSTART
Start-up time
Time from active EN to reach 95% of VOUT
500
ms
(2)
In PFM mode, the internal reference voltage is set to typ. 1.01×Vref. See the parameter measurement information.
PIN ASSIGNMENTS
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NO.
NAME
SON 2x2-8
PGND
1
PWR
GND supply pin for the output stage.
This is the switch pin and is connected to the internal MOSFET switches. Connect the
SW
2
OUT
external inductor between this terminal and the output capacitor.
AGND
3
IN
Analog GND supply pin for the control circuit.
Feedback pin for the internal regulation loop. Connect the external resistor divider to this pin.
FB
4
IN
In case of fixed output voltage option, connect this pin directly to the output capacitor
This is the enable pin of the device. Pulling this pin to low forces the device into shutdown
EN
5
IN
mode. Pulling this pin to high enables the device. This pin must be terminated
MODE: MODE pin = high forces the device to operate in fixed frequency PWM mode. MODE
MODE
IN
pin = low enables the Power Save Mode with automatic transition from PFM mode to fixed
frequency PWM mode. This pin must be terminated.
6
Open
PG: Power Good Open Drain output. Connect an external pull up resistor to a rail which is
PG
Drain
below or equal AVIN.
Analog VIN power supply for the control circuit. Need to be connected to PVIN and input
AVIN
7
IN
capacitor.
PVIN
8
PWR
VIN power supply pin for the output stage.
For good thermal performance, this PAD must be soldered to the land pattern on the pcb.
Power PAD
This PAD should be used as device GND.
4
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Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s) :TPS62065 TPS62067


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