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CDB4222 Datasheet(PDF) 11 Page - Cirrus Logic |
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CDB4222 Datasheet(HTML) 11 Page - Cirrus Logic |
11 / 29 page CS4222 DS236F1 11 SWITCHING SPECIFICATIONS - CONTROL PORT INTERFACE (I2C) (Continued) Notes: 11. Data must be held for sufficient time to bridge the transition time, tfc,of SCL. Parameter Symbol Min Max Unit I2C Mode SCL Clock Frequency fscl - 100 kHz RST Rising Edge to Start tirs 500 - ns Bus Free Time Between Transmissions tbuf 4.7 - µs Start Condition Hold Time (prior to first clock pulse) thdst 4.0 - µs Clock Low time tlow 4.7 - µs Clock High Time thigh 4.0 - µs Setup Time for Repeated Start Condition tsust 4.7 - µs SDA Hold Time from SCL Falling (Note 11) thdd 0- µs SDA Setup time to SCL Rising tsud 250 - ns Rise Time of SCL and SDA tr -1 µs Fall Time SCL and SDA tf - 300 ns Setup Time for Stop Condition tsusp 4.7 - µs t buf t hds t t lo w t hd d t high t su d Sto p S t a r t SD A SC L t irs RS T t hdst t rc t fc t sust t susp St a r t Sto p Re p e a t e d t rd t fd t ac k Figure 3. Control Port Timing - I2CMode |
Número de pieza similar - CDB4222 |
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Descripción similar - CDB4222 |
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