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CDB4226 Datasheet(PDF) 29 Page - Cirrus Logic

No. de Pieza. CDB4226
Descripción  Surround Sound Codec
Descarga  37 Pages
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Fabricante  CIRRUS [Cirrus Logic]
Página de inicio  http://www.cirrus.com
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CDB4226 Datasheet(HTML) 29 Page - Cirrus Logic

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CS4226
DS188F4
29
3.12
Auxiliary Port Mode Byte (0Fh)
This byte is not available when the receiver is functioning.
ADF2-ADF0
Data format
0 - Right justified, 20-bit data
1 - Right justified, 18-bit data
2 - Right justified, 16-bit data
3 - Left justified, 20-bit
4 - I2S compatible, 20-bit
5 - Not used
6 - Not used
7 - Not used
ASCK
Sets the polarity of clocking data
0 - Data clocked in on rising edge of SCLKAUX
1 - Data clocked in on falling edge of SCLKAUX
AMS1-AMS0
Sets the mode of the port.
0 - Slave
1 - Master Burst - SCLKAUXs are gated 128 fs clocks
2 - Master Non-Burst - SCLKAUXs are evenly distributed in LRCKAUX frame
3 - Not used - default to slave
ACK1-ACK0
Set number of bit clocks per Fs period.
0 - 128
1 - 48 - Master Burst or Slave mode only
2 - 32 - All input formats will default to 16 bits.
3 - 64
This register defaults to 00h.
B7
B6
B5
B4
B3
B2
B1
B0
ACK1
ACK0
AMS1
AMS0
ASCK
ADF2
ADF1
ADF0


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