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TPS40303DRCT Datasheet(PDF) 3 Page - Texas Instruments |
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TPS40303DRCT Datasheet(HTML) 3 Page - Texas Instruments |
3 / 29 page TPS40303, TPS40304, TPS40305 www.ti.com SLUS964 – NOVEMBER 2009 ELECTRICAL CHARACTERISTICS TJ = –40°C to 125°C, VVDD = 12 V, all parameters at zero power dissipation (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOLTAGE REFERENCE TJ = 25°C, 3 V < VVDD < 20 V 597 600 603 VFB FB input voltage mV –40°C < TJ < 125°C, 3 V < VVDD < 20 594 600 606 V INPUT SUPPLY VVDD Input supply voltage range 3 20 V IDDSD Shutdown supply current VEN/SS < 0.2 V 70 100 µA IDDQ Quiescent, non-switching Let EN/SS float, VFB = 1 V 2.5 3.5 mA ENABLE/SOFT-START VIH High-level input voltage, EN/SS 0.55 0.70 1.00 V VIL Low-level input voltage, EN/SS 0.27 0.30 0.33 V ISS Soft-start source current 8 10 12 µA VSS Soft-start voltage level 0.4 0.8 1.3 V BP REGULATOR VBP Output voltage IBP = 10 mA 6.2 6.5 6.8 V VDO Regulator dropout voltage, VVDD – VBP IBP = 25 mA, VVDD = 3 V 70 110 mV OSCILLATOR TPS40303 270 300 330 kHz fSW PWM frequency TPS40304 3 V < VVDD < 20 V 540 600 660 kHz TPS40305 1.02 1.20 1.38 MHz VRAMP (1) Ramp amplitude VVDD/6.6 VVDD/6 VVDD/5.4 V Frequency spread spectrum frequency fSWFSS 12% fSW deviation fMOD Modulation frequency 25 KHz PWM TPS40303 90% DMAX (1) Maximum duty cycle TPS40304 VFB = 0 V, 3 V < VVDD < 20 V 90% TPS40305 85% tON(min) (1) Minimum controllable pulse width 100 ns HDRV off to LDRV on 5 25 35 tDEAD Output driver dead time ns LDRV off to HDRV on 5 25 30 ERROR AMPLIFIER GBWP (1) Gain bandwidth product 10 24 MHz AOL (1) Open loop gain 60 dB IIB Input bias current (current out of FB pin) VFB = 0.6 V 75 nA IEAOP Output source current VFB = 0 V 2 mA IEAOM Output sink current VFB = 1 V 2 (1) Ensured by design. Not production tested. Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s) :TPS40303 TPS40304 TPS40305 |
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