HC908JL8AD/D

Addendum to MC68HC908JL8 Technical Data

Reserved Registers

The two registers at $FE08 and $FFCF are reserved locations on the

MC68HC08JL8.

On the MC68HC908JL8, these two locations are the FLASH control register

and the FLASH block protect register respectively.

Mask Option

Register

The mask option register at $FFD0 is read only. The value is defined by mask

option (hard-wired connections) specified at the time as the ROM code

submission.

On the MC68HC908JL8, the MOR is implemented as a FLASH, which can be

programmed, erased, and read.

Monitor ROM

The monitor program (monitor ROM: $FE10–$FFCE) on the MC68HC08JL8 is

for device testing only. $FC00–$FDFF are unused.

Electrical

Specifications

Electrical specifications for the MC68HC908JL8 apply to the MC68HC08JL8,

except for the parameters indicated below.

DC Electrical

Characteristics

Table 2. DC Electrical Characteristics (5V)

Symbol

Min

Max

Unit

RC oscillator option

Values same as, and characterized from

MC68HC908JL8, but not tested.

Low-voltage inhibit, trip falling voltage

4.02 (4.25)

4.48 (4.48)

V

Low-voltage inhibit, trip rising voltage

3.66 (3.75)

4.13 (4.40)

4.59 (4.63)

V

2. Typical values reflect average measurements at midpoint of voltage range, 25

°C only.

3. The numbers in parenthesis are MC68HC908JL8 values.

Table 3. DC Electrical Characteristics (3V)

Symbol

Min

Max

Unit

RC oscillator option

Values same as, and characterized from

MC68HC908JL8, but not tested.

Low-voltage inhibit, trip voltage

(No hysteresis implemented for 3V LVI)

2.4 (2.49)

2.69 (2.68)

V

2. Typical values reflect average measurements at midpoint of voltage range, 25

°C only.

3. The numbers in parenthesis are MC68HC908JL8 values.

Freescale Semiconductor, Inc.

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