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MC908QL4CDWE Datasheet(Hoja de datos) 38 Page - Freescale Semiconductor, Inc

No. de Pieza. MC908QL4CDWE
Descripción  M68HC08 Microcontrollers
Descarga  226 Pages
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Fabricante  FREESCALE [Freescale Semiconductor, Inc]
Página de inicio  http://www.freescale.com
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 38 page
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Memory
MC68HC908QL4 Data Sheet, Rev. 8
38
Freescale Semiconductor
2.6.4 FLASH Program Operation
Programming of the FLASH memory is done on a row basis. A row consists of 32 consecutive bytes
starting from addresses $XX00, $XX20, $XX40, $XX60, $XX80, $XXA0, $XXC0, or $XXE0. Use the
following step-by-step procedure to program a row of FLASH memory
Figure 2-4 shows a flowchart of the programming algorithm.
NOTE
Do not program any byte in the FLASH more than once after a successful
erase operation. Reprogramming bits to a byte which is already
programmed is not allowed without first erasing the page in which the byte
resides or mass erasing the entire FLASH memory. Programming without
first erasing may disturb data stored in the FLASH.
1.
Set the PGM bit. This configures the memory for program operation and enables the latching of
address and data for programming.
2.
Read the FLASH block protect register.
3.
Write any data to any FLASH location within the address range desired.
4.
Wait for a time, tNVS.
5.
Set the HVEN bit.
6.
Wait for a time, tPGS.
7.
Write data to the FLASH address being programmed(1).
8.
Wait for time, tPROG.
9.
Repeat step 7 and 8 until all desired bytes within the row are programmed.
10.
Clear the PGM bit (1).
11.
Wait for time, tNVH.
12.
Clear the HVEN bit.
13.
After time, tRCV, the memory can be accessed in read mode again.
NOTE
The COP register at location $FFFF should not be written between steps
5-12, when the HVEN bit is set. Since this register is located at a valid
FLASH address, unpredictable behavior may occur if this location is written
while HVEN is set.
This program sequence is repeated throughout the memory until all data is programmed.
NOTE
Programming and erasing of FLASH locations cannot be performed by
code being executed from the FLASH memory. While these operations
must be performed in the order shown, other unrelated operations may
occur between the steps. Do not exceed tPROG maximum, see 17.15
Memory Characteristics.
1. The time between each FLASH address change, or the time between the last FLASH address programmed to clearing
PGM bit, must not exceed the maximum programming time, tPROG maximum.




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