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MC908QL4CDWE Datasheet(Hoja de datos) 52 Page - Freescale Semiconductor, Inc

No. de Pieza. MC908QL4CDWE
Descripción  M68HC08 Microcontrollers
Descarga  226 Pages
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Fabricante  FREESCALE [Freescale Semiconductor, Inc]
Página de inicio  http://www.freescale.com
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 52 page
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Analog-to-Digital Converter (ADC10) Module
MC68HC908QL4 Data Sheet, Rev. 8
52
Freescale Semiconductor
charging. If externally available, connect the VREFL pin to the same potential as VSSA at the single point
ground location.
3.7.5 ADC10 Channel Pins (ADn)
The ADC10 has multiple input channels. Empirical data shows that capacitors on the analog inputs
improve performance in the presence of noise or when the source impedance is high. 0.01
μF capacitors
with good high-frequency characteristics are sufficient. These capacitors are not necessary in all cases,
but when used they must be placed as close as possible to the package pins and be referenced to VSSA.
3.8 Registers
These registers control and monitor operation of the ADC10:
ADC10 status and control register, ADCSC
ADC10 data registers, ADRH and ADRL
ADC10 clock register, ADCLK
3.8.1 ADC10 Status and Control Register
This section describes the function of the ADC10 status and control register (ADCSC). Writing ADCSC
aborts the current conversion and initiates a new conversion (if the ADCH[4:0] bits are equal to a value
other than all 1s).
COCO — Conversion Complete Bit
COCO is a read-only bit which is set each time a conversion is completed. This bit is cleared whenever
the status and control register is written or whenever the data register (low) is read.
1 = Conversion completed
0 = Conversion not completed
AIEN — ADC10 Interrupt Enable Bit
When this bit is set, an interrupt is generated at the end of a conversion. The interrupt signal is cleared
when the data register is read or the status/control register is written.
1 = ADC10 interrupt enabled
0 = ADC10 interrupt disabled
ADCO — ADC10 Continuous Conversion Bit
When this bit is set, the ADC10 will begin to convert samples continuously (continuous conversion
mode) and update the result registers at the end of each conversion, provided the ADCH[4:0] bits do
not decode to all 1s. The ADC10 will continue to convert until the MCU enters reset, the MCU enters
stop mode (if ACLKEN is clear), ADCLK is written, or until ADCSC is written again. If stop is entered
Bit 7
654321
Bit 0
Read:
COCO
AIEN
ADCO
ADCH4
ADCH3
ADCH2
ADCH1
ADCH0
Write:
Reset:
00011111
= Unimplemented
Figure 3-3. ADC10 Status and Control Register (ADCSC)




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