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MC908QC8CDRE Datasheet(PDF) 32 Page - Freescale Semiconductor, Inc

No. de Pieza. MC908QC8CDRE
Descripción  M68HC08 Microcontrollers
Descarga  274 Pages
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Fabricante  FREESCALE [Freescale Semiconductor, Inc]
Página de inicio  http://www.freescale.com
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MC908QC8CDRE Datasheet(HTML) 32 Page - Freescale Semiconductor, Inc

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Memory
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 5
32
Freescale Semiconductor
$0242
TIM2 Counter Register Low
(T2CNTL)
See page 214.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
00000000
$0243
TIM2 Counter Modulo
Register High (T2MODH)
See page 215.
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
11111111
$0244
TIM2 Counter Modulo
Register Low (T2MODL)
See page 215.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
11111111
$0245
TIM2 Channel 0 Status and
Control Register (T2SC0)
See page 215.
Read:
CH0F
CH0IE
MS0B
MS0A
ELS0B
ELS0A
TOV0
CH0MAX
Write:
0
Reset:
00000000
$0246
TIM2 Channel 0 Register
High (T2CH0H)
See page 218.
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
Indeterminate after reset
$0247
TIM2 Channel 0 Register
Low (T2CH0L)
See page 218.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Indeterminate after reset
$0248
TIM2 Channel 1 Status and
Control Register (T2SC1)
See page 215.
Read:
CH1F
CH1IE
0
MS1A
ELS1B
ELS1A
TOV1
CH1MAX
Write:
0
Reset:
00000000
$0249
TIM2 Channel 1 Register
High (T2CH1H)
See page 218.
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
Indeterminate after reset
$024A
TIM2 Channel 1 Register
Low (T2CH1L)
See page 218.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Indeterminate after reset
$024B
Reserved
$024C
Periodic Wakeup Status
and Control Register
(PWUSC)
See page 119.
Read:
0
0
PWUON
PWUCLK-
SEL
PWUF
0
PWUIE
SMODE
Write:
PWUACK
Reset:
00000000
$024D
Periodic Wakeup Prescaler
Register (PWUP)
See page 120.
Read:
0
0
0
0
PS3
PS2
PS1
PS0
Write:
Reset:
00000000
$024E
Periodic Wakeup Modulo
Register (PWUMOD)
See page 121.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
00000000
Addr.
Register Name
Bit 7
6
5
4321
Bit 0
= Unimplemented
R
= Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 6 of 8)


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