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MC908QC8CDRE Datasheet(PDF) 75 Page - Freescale Semiconductor, Inc

No. de Pieza. MC908QC8CDRE
Descripción  M68HC08 Microcontrollers
Descarga  274 Pages
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Fabricante  FREESCALE [Freescale Semiconductor, Inc]
Página de inicio  http://www.freescale.com
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MC908QC8CDRE Datasheet(HTML) 75 Page - Freescale Semiconductor, Inc

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Instruction Set Summary
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 5
Freescale Semiconductor
75
JMP opr
JMP opr
JMP opr,X
JMP opr,X
JMP ,X
Jump
PC
← Jump Address
– – – – – –
DIR
EXT
IX2
IX1
IX
BC
CC
DC
EC
FC
dd
hh ll
ee ff
ff
2
3
4
3
2
JSR opr
JSR opr
JSR opr,X
JSR opr,X
JSR ,X
Jump to Subroutine
PC
← (PC) + n (n = 1, 2, or 3)
Push (PCL); SP
← (SP) – 1
Push (PCH); SP
← (SP) – 1
PC
← Unconditional Address
––––––
DIR
EXT
IX2
IX1
IX
BD
CD
DD
ED
FD
dd
hh ll
ee ff
ff
4
5
6
5
4
LDA #opr
LDA opr
LDA opr
LDA opr,X
LDA opr,X
LDA ,X
LDA opr,SP
LDA opr,SP
Load A from M
A
← (M)
0 – –
↕↕ –
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
A6
B6
C6
D6
E6
F6
9EE6
9ED6
ii
dd
hh ll
ee ff
ff
ff
ee ff
2
3
4
4
3
2
4
5
LDHX #opr
LDHX opr
Load H:X from M
H:X
← (M:M + 1)
0––
↕↕ – IMM
DIR
45
55
ii jj
dd
3
4
LDX #opr
LDX opr
LDX opr
LDX opr,X
LDX opr,X
LDX ,X
LDX opr,SP
LDX opr,SP
Load X from M
X
← (M)
0 – –
↕↕ –
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
AE
BE
CE
DE
EE
FE
9EEE
9EDE
ii
dd
hh ll
ee ff
ff
ff
ee ff
2
3
4
4
3
2
4
5
LSL opr
LSLA
LSLX
LSL opr,X
LSL ,X
LSL opr,SP
Logical Shift Left
(Same as ASL)
↕ –– ↕↕↕
DIR
INH
INH
IX1
IX
SP1
38
48
58
68
78
9E68
dd
ff
ff
4
1
1
4
3
5
LSR opr
LSRA
LSRX
LSR opr,X
LSR ,X
LSR opr,SP
Logical Shift Right
↕ ––0 ↕↕
DIR
INH
INH
IX1
IX
SP1
34
44
54
64
74
9E64
dd
ff
ff
4
1
1
4
3
5
MOV opr,opr
MOV opr,X+
MOV #opr,opr
MOV X+,opr
Move
(M)Destination ← (M)Source
H:X
← (H:X) + 1 (IX+D, DIX+)
0––
↕↕ –
DD
DIX+
IMD
IX+D
4E
5E
6E
7E
dd dd
dd
ii dd
dd
5
4
4
4
MUL
Unsigned multiply
X:A
← (X) × (A)
– 0 – – – 0 INH
42
5
NEG opr
NEGA
NEGX
NEG opr,X
NEG ,X
NEG opr,SP
Negate (Two’s Complement)
M
← –(M) = $00 – (M)
A
← –(A) = $00 – (A)
X
← –(X) = $00 – (X)
M
← –(M) = $00 – (M)
M
← –(M) = $00 – (M)
↕ –– ↕↕↕
DIR
INH
INH
IX1
IX
SP1
30
40
50
60
70
9E60
dd
ff
ff
4
1
1
4
3
5
NOP
No Operation
None
– – – – – – INH
9D
1
NSA
Nibble Swap A
A
← (A[3:0]:A[7:4])
– – – – – – INH
62
3
ORA #opr
ORA opr
ORA opr
ORA opr,X
ORA opr,X
ORA ,X
ORA opr,SP
ORA opr,SP
Inclusive OR A and M
A
← (A) | (M)
0 – –
↕↕ –
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
AA
BA
CA
DA
EA
FA
9EEA
9EDA
ii
dd
hh ll
ee ff
ff
ff
ee ff
2
3
4
4
3
2
4
5
PSHA
Push A onto Stack
Push (A); SP
← (SP) – 1
– – – – – – INH
87
2
PSHH
Push H onto Stack
Push (H); SP
← (SP) – 1
– – – – – – INH
8B
2
PSHX
Push X onto Stack
Push (X); SP
← (SP) – 1
– – – – – – INH
89
2
Table 6-1. Instruction Set Summary (Sheet 4 of 6)
Source
Form
Operation
Description
Effect
on CCR
VH I N Z C
C
b0
b7
0
b0
b7
C
0


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