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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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MC908QT1AMFQE Datasheet(PDF) 76 Page - Freescale Semiconductor, Inc |
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MC908QT1AMFQE Datasheet(HTML) 76 Page - Freescale Semiconductor, Inc |
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76 / 200 page  Table 7-2. Opcode Map Bit Manipulation Branch Read-Modify-Write Control Register/Memory DIR DIR REL DIR INH INH IX1 SP1 IX INH INH IMM DIR EXT IX2 SP2 IX1 SP1 IX 0 1 2 3 4 5 6 9E6 7 8 9 A B C D 9ED E 9EE F 0 5 BRSET0 3DIR 4 BSET0 2DIR 3 BRA 2REL 4 NEG 2DIR 1 NEGA 1INH 1 NEGX 1INH 4 NEG 2IX1 5 NEG 3 SP1 3 NEG 1IX 7 RTI 1INH 3 BGE 2REL 2 SUB 2IMM 3 SUB 2DIR 4 SUB 3EXT 4 SUB 3IX2 5 SUB 4 SP2 3 SUB 2IX1 4 SUB 3 SP1 2 SUB 1IX 1 5 BRCLR0 3DIR 4 BCLR0 2DIR 3 BRN 2REL 5 CBEQ 3DIR 4 CBEQA 3IMM 4 CBEQX 3IMM 5 CBEQ 3IX1+ 6 CBEQ 4 SP1 4 CBEQ 2IX+ 4 RTS 1INH 3 BLT 2REL 2 CMP 2IMM 3 CMP 2DIR 4 CMP 3EXT 4 CMP 3IX2 5 CMP 4 SP2 3 CMP 2IX1 4 CMP 3 SP1 2 CMP 1IX 2 5 BRSET1 3DIR 4 BSET1 2DIR 3 BHI 2REL 5 MUL 1INH 7 DIV 1INH 3 NSA 1INH 2 DAA 1INH 3 BGT 2REL 2 SBC 2IMM 3 SBC 2DIR 4 SBC 3EXT 4 SBC 3IX2 5 SBC 4 SP2 3 SBC 2IX1 4 SBC 3 SP1 2 SBC 1IX 3 5 BRCLR1 3DIR 4 BCLR1 2DIR 3 BLS 2REL 4 COM 2DIR 1 COMA 1INH 1 COMX 1INH 4 COM 2IX1 5 COM 3 SP1 3 COM 1IX 9 SWI 1INH 3 BLE 2REL 2 CPX 2IMM 3 CPX 2DIR 4 CPX 3EXT 4 CPX 3IX2 5 CPX 4 SP2 3 CPX 2IX1 4 CPX 3 SP1 2 CPX 1IX 4 5 BRSET2 3DIR 4 BSET2 2DIR 3 BCC 2REL 4 LSR 2DIR 1 LSRA 1INH 1 LSRX 1INH 4 LSR 2IX1 5 LSR 3 SP1 3 LSR 1IX 2 TAP 1INH 2 TXS 1INH 2 AND 2IMM 3 AND 2DIR 4 AND 3EXT 4 AND 3IX2 5 AND 4 SP2 3 AND 2IX1 4 AND 3 SP1 2 AND 1IX 5 5 BRCLR2 3DIR 4 BCLR2 2DIR 3 BCS 2REL 4 STHX 2DIR 3 LDHX 3IMM 4 LDHX 2DIR 3 CPHX 3IMM 4 CPHX 2DIR 1 TPA 1INH 2 TSX 1INH 2 BIT 2IMM 3 BIT 2DIR 4 BIT 3EXT 4 BIT 3IX2 5 BIT 4 SP2 3 BIT 2IX1 4 BIT 3 SP1 2 BIT 1IX 6 5 BRSET3 3DIR 4 BSET3 2DIR 3 BNE 2REL 4 ROR 2DIR 1 RORA 1INH 1 RORX 1INH 4 ROR 2IX1 5 ROR 3 SP1 3 ROR 1IX 2 PULA 1INH 2 LDA 2IMM 3 LDA 2DIR 4 LDA 3EXT 4 LDA 3IX2 5 LDA 4 SP2 3 LDA 2IX1 4 LDA 3 SP1 2 LDA 1IX 7 5 BRCLR3 3DIR 4 BCLR3 2DIR 3 BEQ 2REL 4 ASR 2DIR 1 ASRA 1INH 1 ASRX 1INH 4 ASR 2IX1 5 ASR 3 SP1 3 ASR 1IX 2 PSHA 1INH 1 TAX 1INH 2 AIS 2IMM 3 STA 2DIR 4 STA 3EXT 4 STA 3IX2 5 STA 4 SP2 3 STA 2IX1 4 STA 3 SP1 2 STA 1IX 8 5 BRSET4 3DIR 4 BSET4 2DIR 3 BHCC 2REL 4 LSL 2DIR 1 LSLA 1INH 1 LSLX 1INH 4 LSL 2IX1 5 LSL 3 SP1 3 LSL 1IX 2 PULX 1INH 1 CLC 1INH 2 EOR 2IMM 3 EOR 2DIR 4 EOR 3EXT 4 EOR 3IX2 5 EOR 4 SP2 3 EOR 2IX1 4 EOR 3 SP1 2 EOR 1IX 9 5 BRCLR4 3DIR 4 BCLR4 2DIR 3 BHCS 2REL 4 ROL 2DIR 1 ROLA 1INH 1 ROLX 1INH 4 ROL 2IX1 5 ROL 3 SP1 3 ROL 1IX 2 PSHX 1INH 1 SEC 1INH 2 ADC 2IMM 3 ADC 2DIR 4 ADC 3EXT 4 ADC 3IX2 5 ADC 4 SP2 3 ADC 2IX1 4 ADC 3 SP1 2 ADC 1IX A 5 BRSET5 3DIR 4 BSET5 2DIR 3 BPL 2REL 4 DEC 2DIR 1 DECA 1INH 1 DECX 1INH 4 DEC 2IX1 5 DEC 3 SP1 3 DEC 1IX 2 PULH 1INH 2 CLI 1INH 2 ORA 2IMM 3 ORA 2DIR 4 ORA 3EXT 4 ORA 3IX2 5 ORA 4 SP2 3 ORA 2IX1 4 ORA 3 SP1 2 ORA 1IX B 5 BRCLR5 3DIR 4 BCLR5 2DIR 3 BMI 2REL 5 DBNZ 3DIR 3 DBNZA 2INH 3 DBNZX 2INH 5 DBNZ 3IX1 6 DBNZ 4 SP1 4 DBNZ 2IX 2 PSHH 1INH 2 SEI 1INH 2 ADD 2IMM 3 ADD 2DIR 4 ADD 3EXT 4 ADD 3IX2 5 ADD 4 SP2 3 ADD 2IX1 4 ADD 3 SP1 2 ADD 1IX C 5 BRSET6 3DIR 4 BSET6 2DIR 3 BMC 2REL 4 INC 2DIR 1 INCA 1INH 1 INCX 1INH 4 INC 2IX1 5 INC 3 SP1 3 INC 1IX 1 CLRH 1INH 1 RSP 1INH 2 JMP 2DIR 3 JMP 3EXT 4 JMP 3IX2 3 JMP 2IX1 2 JMP 1IX D 5 BRCLR6 3DIR 4 BCLR6 2DIR 3 BMS 2REL 3 TST 2DIR 1 TSTA 1INH 1 TSTX 1INH 3 TST 2IX1 4 TST 3 SP1 2 TST 1IX 1 NOP 1INH 4 BSR 2REL 4 JSR 2DIR 5 JSR 3EXT 6 JSR 3IX2 5 JSR 2IX1 4 JSR 1IX E 5 BRSET7 3DIR 4 BSET7 2DIR 3 BIL 2REL 5 MOV 3DD 4 MOV 2DIX+ 4 MOV 3IMD 4 MOV 2IX+D 1 STOP 1INH * 2 LDX 2IMM 3 LDX 2DIR 4 LDX 3EXT 4 LDX 3IX2 5 LDX 4 SP2 3 LDX 2IX1 4 LDX 3 SP1 2 LDX 1IX F 5 BRCLR7 3DIR 4 BCLR7 2DIR 3 BIH 2REL 3 CLR 2DIR 1 CLRA 1INH 1 CLRX 1INH 3 CLR 2IX1 4 CLR 3 SP1 2 CLR 1IX 1 WAIT 1INH 1 TXA 1INH 2 AIX 2IMM 3 STX 2DIR 4 STX 3EXT 4 STX 3IX2 5 STX 4 SP2 3 STX 2IX1 4 STX 3 SP1 2 STX 1IX INH Inherent REL Relative SP1 Stack Pointer, 8-Bit Offset IMM Immediate IX Indexed, No Offset SP2 Stack Pointer, 16-Bit Offset DIR Direct IX1 Indexed, 8-Bit Offset IX+ Indexed, No Offset with EXT Extended IX2 Indexed, 16-Bit Offset Post Increment DD Direct-Direct IMD Immediate-Direct IX1+ Indexed, 1-Byte Offset with IX+D Indexed-Direct DIX+ Direct-Indexed Post Increment *Pre-byte for stack pointer indexed instructions 0 High Byte of Opcode in Hexadecimal Low Byte of Opcode in Hexadecimal 0 5 BRSET0 3DIR Cycles Opcode Mnemonic Number of Bytes / Addressing Mode MSB LSB MSB LSB |
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