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MC908QT2MFQE Datasheet(PDF) 96 Page - Freescale Semiconductor, Inc

No. de pieza MC908QT2MFQE
Descripción Electrónicos  M68HC08 Microcontrollers
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Fabricante Electrónico  FREESCALE [Freescale Semiconductor, Inc]
Página de inicio  http://www.freescale.com
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MC908QT2MFQE Datasheet(HTML) 96 Page - Freescale Semiconductor, Inc

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Oscillator Module (OSC)
MC68HC908QY/QT Family Data Sheet, Rev. 6
96
Freescale Semiconductor
11.8.1 Oscillator Status Register
The oscillator status register (OSCSTAT) contains the bits for switching from internal to external clock
sources.
ECGON — External Clock Generator On Bit
This read/write bit enables external clock generator, so that the switching process can be initiated. This
bit is forced low during reset. This bit is ignored in monitor mode with the internal oscillator bypassed,
PTM or CTM mode.
1 = External clock generator enabled
0 = External clock generator disabled
ECGST — External Clock Status Bit
This read-only bit indicates whether or not an external clock source is engaged to drive the system
clock.
1 = An external clock source engaged
0 = An external clock source disengaged
11.8.2 Oscillator Trim Register (OSCTRIM)
TRIM7–TRIM0 — Internal Oscillator Trim Factor Bits
These read/write bits change the size of the internal capacitor used by the internal oscillator. By
measuring the period of the internal clock and adjusting this factor accordingly, the frequency of the
internal clock can be fine tuned. Increasing (decreasing) this factor by one increases (decreases) the
period by approximately 0.2% of the untrimmed period (the period for TRIM = $80). The trimmed
frequency is guaranteed not to vary by more than ±5% over the full specified range of temperature and
voltage. The reset value is $80, which sets the frequency to 12.8 MHz (3.2 MHz bus speed) ±25%.
Applications using the internal oscillator should copy the internal oscillator trim value at location $FFC0
or $FFC1 into this register to trim the clock source.
Address: $0036
Bit 7
654321
Bit 0
Read:
RRRRRR
ECGON
ECGST
Write:
Reset:
00000000
R
=Reserved
= Unimplemented
Figure 11-4. Oscillator Status Register (OSCSTAT)
Address: $0038
Bit 7
654321
Bit 0
Read:
TRIM7
TRIM6
TRIM5
TRIM4
TRIM3
TRIM2
TRIM1
TRIM0
Write:
Reset:
10000000
Figure 11-5. Oscillator Trim Register (OSCTRIM)


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