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PIC16F785 Datasheet(PDF) 95 Page - Microchip Technology |
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PIC16F785 Datasheet(HTML) 95 Page - Microchip Technology |
95 / 206 page © 2008 Microchip Technology Inc. DS41249E-page 93 PIC16F785/HV785 REGISTER 13-1: PWMCON0: PWM CONTROL REGISTER 0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 PRSEN PASEN BLANK2 BLANK1 SYNC1 SYNC0 PH2EN PH1EN bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7 PRSEN: PWM Restart Enable bit 1 = Upon auto-shutdown, the PWMASE shutdown bit clears automatically once the shutdown condi- tion goes away. The PWM restarts automatically. 0 = Upon auto-shutdown, the PWMASE must be cleared in firmware to restart the PWM. bit 6 PASEN: PWM Auto-Shutdown Enable bit 0 = PWM auto-shutdown is disabled 1 =VIL on INT pin will cause auto-shutdown event bit 5 BLANK2: PH2 Blanking bit(1) 1 = The PH2 pin is active for a minimum of 1/2 of an FOSC clock period after it is set 0 = The PH2 pin is reset as soon as the comparator trigger is active bit 4 BLANK1: PH1 Blanking bit(1) 1 = The PH1 pin is active for a minimum of 1/2 of an FOSC clock period after it is set 0 = The PH1 pin is reset as soon as the comparator trigger is active bit 3-2 SYNC<1:0>: SYNC Pin Function bits 0X = SYNC pin not used for PWM. PWM acts as its own master. RB7/SYNC pin is available for gen- eral purpose I/O. 10 = SYNC pin acts as system slave, receiving the PWM counter reset pulse 11 = SYNC pin acts as system master, driving the PWM counter reset pulse bit 1 PH2EN: PH2 Pin Enabled bit 1 = The PH2 pin is driven by the PWM signal 0 = The PH2 pin is not used for PWM functions bit 0 PH1EN: PH1 Pin Enabled bit 1 = The PH1 pin is driven by the PWM signal 0 = The PH1 pin is not used for PWM functions Note 1: Blanking is disabled when operating in complementary mode. See COMOD<1:0> bits in the PWMCON1 register (Register 13-5) for more information. |
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