DLPA200

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DLPS015A – APRIL 2010 – REVISED JUNE 2010

Device Marking

The device marking consists of the fields shown in Figure 1.

Figure 1. Device Marking (Device Top View)

TERMINAL FUNCTIONS

TERMINAL

I/O

(INPUT

DESCRIPTION

NAME

NO.

DEFAULT)

OUT00

22

Output

16 micromirror clocking waveform outputs (enabled by OE = 0).

OUT01

24

Output

OUT02

27

Output

OUT03

29

Output

OUT04

32

Output

OUT05

34

Output

OUT06

37

Output

OUT07

39

Output

OUT08

62

Output

OUT09

64

Output

OUT10

67

Output

OUT11

69

Output

OUT12

72

Output

OUT13

74

Output

OUT14

77

Output

OUT15

79

Output

A0

19

Input (pull down)

Output Address. Used to select which OUTxx pin is active at a given time.

A1

18

Input (pull down)

A2

17

Input (pull down)

A3

16

Input (pull down)

MODE0

3

Input (pull down)

Mode Select. Used to determine the operating mode of the DLPA200.

MODE1

2

Input (pull down)

SEL0

5

Input (pull down)

Output Voltage Select. Used to switch the voltage applied to the addressed OUTxx

pin.

SEL1

4

Input (pull down)

STROBE

15

Input (pull down)

A rising edge on STROBE latches in the control signals after a tri-state delay.

Asynchronous input controls whether the 16 OUTxx pins are active or are in a in

OE

6

Input (pull up)

high-impedance state.

OE = 0 : Enabled. OE = 1 : High Z.

RESET

59

Input (pull up)

Resets the DLPA200 internal logic. Active low. Asynchronous.

SCPEN

58

Input (pull up)

Enables serial bus data transfers. Active low.

Copyright © 2010, Texas Instruments Incorporated

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Product Folder Link(s): DLPA200