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SN74AUP1G32DCKT Datasheet(PDF) 1 Page - Texas Instruments |
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SN74AUP1G32DCKT Datasheet(HTML) 1 Page - Texas Instruments |
1 / 22 page 3 2 4 5 1 A VCC Y B GND DBV PACKAGE (TOP VIEW) DCK PACKAGE (TOP VIEW) 3 2 4 5 1 A VCC Y B GND 3 2 4 5 1 A VCC Y B GND DRL PACKAGE (TOP VIEW) DNU – Do not use NC – No internal connection See mechanical drawings for dimensions. DRY PACKAGE (TOP VIEW) B N.C. A 6 5 4 2 3 GND Y V CC 1 GND Y 3 4 B 2 5 A 6 1 N.C. V CC DSF PACKAGE (TOP VIEW) YZP PACKAGE (TOP VIEW) YFP PACKAGE ( VIEW) TOP GND A Y V CC B 3 5 2 1 4 A1 B1 C1 A2 C2 GND A Y V CC B 3 6 2 1 4 5 DNU A1 B1 C1 A2 B2 C2 Y + A ) B or Y + A • B SN74AUP1G32 www.ti.com SCES580F – JUNE 2004 – REVISED MARCH 2010 LOW-POWER SINGLE 2-INPUT POSITIVE-OR GATE Check for Samples: SN74AUP1G32 1 FEATURES • Available in the Texas Instruments NanoStar™ • Wide Operating VCC Range of 0.8 V to 3.6 V Package • Optimized for 3.3-V Operation • Low Static-Power Consumption • 3.6-V I/O Tolerant to Support Mixed-Mode (ICC = 0.9 mA Max) Signal Operation • Low Dynamic-Power Consumption • tpd = 4.6 ns Max at 3.3 V (Cpd = 4.3 pF Typ at 3.3 V) • Suitable for Point-to-Point Applications • Low Input Capacitance (CI = 1.5 pF Typ) • Latch-Up Performance Exceeds 100 mA Per • Low Noise – Overshoot and Undershoot JESD 78, Class II <10% of VCC • ESD Performance Tested Per JESD 22 • Ioff Supports Partial-Power-Down Mode – 2000-V Human-Body Model Operation (A114-B, Class II) • Input Hysteresis Allows Slow Input Transition – 1000-V Charged-Device Model (C101) and Better Switching Noise Immunity at the Input (Vhys = 250 mV Typ at 3.3 V) DESCRIPTION/ORDERING INFORMATION The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable applications. This family ensures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life. This product also maintains excellent signal integrity (see Figure 1 and Figure 2). This single 2-input positive-OR gate performs the Boolean function in positive logic. NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 2004–2010, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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