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TDA19978BHV Datasheet(PDF) 5 Page - NXP Semiconductors |
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TDA19978BHV Datasheet(HTML) 5 Page - NXP Semiconductors |
5 / 38 page TDA19978B_2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 02 — 10 May 2010 5 of 38 NXP Semiconductors TDA19978B Quad HDMI 1.3a receiver with digital processing 7. Pinning information 7.1 Pinning 7.2 Pin description Fig 2. Pin configuration for TDA19978B TDA19978BHV 001aai416 108 73 1 36 Table 3. Pin description Symbol Pin Type[1] Description VSSC 1 G ground for the digital core PD 2 I power-down control input (active HIGH) VDDH(3V3) 3 P HDMI receiver supply voltage; 3.3 V RXDC+ 4 I HDMI input D positive clock channel RXDC − 5 I HDMI input D negative clock channel VSSH 6 G HDMI receiver ground RXCC − 7 I HDMI input C negative clock channel RXCC+ 8 I HDMI input C positive clock channel VDDH(3V3) 9 P HDMI receiver supply voltage; 3.3 V RXD0+ 10 I HDMI input D positive data channel 0 RXD0 − 11 I HDMI input D negative data channel 0 VSSH 12 G HDMI receiver ground RXC0 − 13 I HDMI input C negative data channel 0 RXC0+ 14 I HDMI input C positive data channel 0 VDDH(1V8) 15 P HDMI receiver supply voltage; 1.8 V RXD1+ 16 I HDMI input D positive data channel 1 RXD1 − 17 I HDMI input D negative data channel 1 VSSH 18 G HDMI receiver ground RXC1 − 19 I HDMI input C negative data channel 1 RXC1+ 20 I HDMI input C positive data channel 1 VDDH(3V3) 21 P HDMI receiver supply voltage; 3.3 V RXD2+ 22 I HDMI input D positive data channel 2 RXD2 − 23 I HDMI input D negative data channel 2 |
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