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CAT22C10WI-20-T1 Datasheet(PDF) 7 Page - ON Semiconductor |
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CAT22C10WI-20-T1 Datasheet(HTML) 7 Page - ON Semiconductor |
7 / 10 page CAT22C10 7 Doc No. MD-1082, Rev. R © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice. Write With the chip enabled and the nonvolatile functions inhibited, the Write Enable ( WE) pin will select the write mode when driven to a low level. In this mode, the address must be supplied for the byte being written. After the set-up time (tAS), the input data must be supplied to pins I/O0–I/O3. When these conditions, in- Figure 2. Write Cycle Timing Figure 3. Early Write Cycle Timing cluding the write pulse width time (tWP) are met, the data will be written to the specified location in the Static RAM. A write function may also be initiated from the standby mode by driving WE low, inhibiting the nonvolatile func- tions, supplying valid addresses, and then taking CS low and supplying input data. tWC tAS tWR DATA VALID CS DATA IN ADDRESS WE tWP tDW tCW tDH DATA OUT HIGH-Z tWC tAS tWR DATA VALID CS DATA IN ADDRESS WE tWP tDW tCW tDH DATA OUT tWZ tOW HIGH-Z |
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