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CAT522LI-T2 Datasheet(PDF) 3 Page - ON Semiconductor |
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CAT522LI-T2 Datasheet(HTML) 3 Page - ON Semiconductor |
3 / 15 page Not Recommended for New Design CAT522 © 2008 SCILLC. All rights reserved. 3 Doc. No. MD-2004 Rev. I Characteristics subject to change without notice ABSOLUTE MAXIMUM RATINGS (1) Parameters Ratings Units Supply Voltage VDD to GND -0.5 to +7 V Inputs CLK to GND -0.5 to VDD +0.5 V CS to GND -0.5 to VDD +0.5 V DI to GND -0.5 to VDD +0.5 V RDY/BSY ¯¯¯¯ to GND -0.5 to VDD +0.5 V PROG to GND -0.5 to VDD +0.5 V VREFH to GND -0.5 to VDD +0.5 V VREFL to GND -0.5 to VDD +0.5 V Parameters Ratings Units Outputs D0 to GND -0.5 to VDD +0.5 V VOUT 1– 4 to GND -0.5 to VDD +0.5 V Operating Ambient Temperature Commercial (‘C’ or Blank suffix) 0 to +70 °C Industrial (‘I’ suffix) -40 to +85 °C Junction Temperature +150 °C Storage Temperature -65 to +150 °C Lead Soldering (10s max) +300 °C RELIABILITY CHARACTERISTICS Symbol Parameter Test Method Min Max Units VZAP (2) ESD Susceptibility MIL-STD-883, Test Method 3015 2000 V ILTH (2) (3) Latch-Up JEDEC Standard 17 100 mA POWER SUPPLY Symbol Parameter Conditions Min Typ Max Units IDD1 Supply Current (Read) Normal Operating — 400 600 µA IDD2 Supply Current (Write) Programming, VDD = 5V — 1600 2500 µA VDD = 3V — 1000 1600 µA VDD Operating Voltage Range 2.7 — 5.5 V LOGIC INPUTS Symbol Parameter Conditions Min Typ Max Units IIH Input Leakage Current VIN = VDD — — 10 µA IIL Input Leakage Current VIN = 0V — — -10 µA VIH High Level Input Voltage 2 — VDD V VIL Low Level Input Voltage 0 — 0.8 V LOGIC OUTPUTS Symbol Parameter Conditions Min Typ Max Units VOH High Level Output Voltage IOH = -40µA VDD -0.3 — — V VIL Low Level Output Voltage IOL = 1mA, VDD = +5V — — 0.4 V IOL = 0.4mA, VDD = +3V — — 0.4 V Notes: (1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. (2) This parameter is tested initially and after a design or process change that affects the parameter. (3) Latch-up protection is provided for stresses up to 100mA on address and data pins from –1V to VCC + 1V. |
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