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CAT93C56YA-GT3E Datasheet(PDF) 8 Page - ON Semiconductor

No. de pieza CAT93C56YA-GT3E
Descripción Electrónicos  2-Kb Microwire Serial CMOS EEPROM
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Fabricante Electrónico  ONSEMI [ON Semiconductor]
Página de inicio  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

CAT93C56YA-GT3E Datasheet(HTML) 8 Page - ON Semiconductor

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CAT93C56, CAT93C57
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8
Write
After receiving a WRITE command (Figure 5), address
and the data, the CS (Chip Select) pin must be deselected for
a minimum of tCSMIN. The falling edge of CS will start the
self clocking clear and data store cycle of the memory
location specified in the instruction. The clocking of the SK
pin is not necessary after the device has entered the self
clocking mode. The ready/busy status of the CAT93C56/57
can be determined by selecting the device and polling the
DO pin. Since this device features Auto−Clear before write,
it is NOT necessary to erase a memory location before it is
written into.
Erase
Upon receiving an ERASE command and address, the CS
(Chip Select) pin must be deasserted for a minimum of
tCSMIN (Figure 6). The falling edge of CS will start the self
clocking clear cycle of the selected memory location. The
clocking of the SaK pin is not necessary after the device has
entered the self clocking mode. The ready/busy status of the
CAT93C56/57 can be determined by selecting the device
and polling the DO pin. Once cleared, the content of a
cleared location returns to a logical “1” state.
SK
CS
DI
DO
STANDBY
HIGH−Z
HIGH−Z
10
1
BUSY
READY
STATUS
VERIFY
Figure 5. Write Instruction Timing
AN AN−1
A0
DN
D0
tCSMIN
tHZ
tSV
tEW
SK
CS
DI
DO
STANDBY
HIGH−Z
HIGH−Z
1
BUSY
READY
STATUS VERIFY
11
Figure 6. Erase Instruction Timing
AN
AN−1
A0
tCS
tSV
tHZ
tEW


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