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CDCM61002 Datasheet(PDF) 1 Page - Texas Instruments |
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CDCM61002 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 35 page CDCM61002 www.ti.com SCAS870D – FEBRUARY 2009 – REVISED JULY 2010 Two Output, Integrated VCO, Low-Jitter Clock Generator Check for Samples: CDCM61002 1 FEATURES • Low Output Skew of 20 ps on LVPECL Outputs 2 • One Crystal/LVCMOS Reference Input • Divider Programming Using Control Pins: Including 24.8832 MHz, 25 MHz, and – Two Pins for Prescaler/Feedback Divider 26.5625 MHz – Three Pins for Output Divider • Input Frequency Range: 21.875 MHz to – Two Pins for Output Select 28.47 MHz • Chip Enable Control Pin Available • On-Chip VCO Operates in Frequency Range of • 3.3-V Core and I/O Power Supply 1.75 GHz to 2.05 GHz • Industrial Temperature Range: –40°C to +85°C • 2x Output Available: • 5-mm × 5-mm, 32-pin, QFN (RHB) Package – Pin-Selectable Between LVPECL, LVDS, or • ESD Protection Exceeds 2 kV (HBM) 2-LVCMOS; Operates at 3.3 V • LVCMOS Bypass Output Available APPLICATIONS • Output Frequency Selectable by /1, /2, /3, /4, /6, • Low Jitter Clock Driver for High-End Datacom /8 from a Single Output Divider Applications Including SONET, Ethernet, Fibre • Supports Common LVPECL/LVDS Output Channel, Serial ATA, and HDTV Frequencies: • Cost-Effective High-Frequency Crystal Oscillator Replacement – 62.5 MHz, 74.25 MHz, 75 MHz, 77.76 MHz, 100 MHz, 106.25 MHz, 125 MHz, 150 MHz, 155.52 MHz, 156.25 MHz, 159.375 MHz, 187.5 MHz, 200 MHz, 212.5 MHz, 250 MHz, DESCRIPTION 311.04 MHz, 312.5 MHz, 622.08 MHz, The CDCM61002 is a highly versatile, low-jitter 625 MHz frequency synthesizer that can generate two low-jitter • Supports Common LVCMOS Output clock outputs, selectable between low-voltage Frequencies: positive emitter coupled logic (LVPECL), low-voltage differential signaling (LVDS), or low-voltage – 62.5 MHz, 74.25 MHz, 75 MHz, 77.76 MHz, complementary metal oxide semiconductor 100 MHz, 106.25 MHz, 125 MHz, 150 MHz, (LVCMOS) outputs, from a low-frequency crystal or 155.52 MHz, 156.25 MHz, 159.375 MHz, LVCMOS input for a variety of wireline and data 187.5 MHz, 200 MHz, 212.5 MHz, 250 MHz communication applications. The CDCM61002 • Output Frequency Range: 43.75 MHz to features an onboard PLL that can be easily 683.264 MHz (See Table 3) configured solely through control pins. The overall output random jitter performance is less than 1ps, • Internal PLL Loop Bandwidth: 400 kHz RMS (from 10 kHz to 20 MHz), making this device a • High-Performance PLL Core: perfect choice for use in demanding applications such – Phase Noise typically at –146 dBc/Hz at as SONET, Ethernet, Fibre Channel, and SAN. The 5-MHz Offset for 625-MHz LVPECL Output CDCM61002 is available in a small, 32-pin, 5-mm × 5-mm QFN package. – Random Jitter typically at 0.509 ps, RMS (10 kHz to 20 MHz) for 625-MHz LVPECL Output • Output Duty Cycle Corrected to 50% (± 5%) 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Copyright © 2009–2010, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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