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LM3S8962-EQN80-A2T Datasheet(PDF) 4 Page - Texas Instruments

No. de pieza LM3S8962-EQN80-A2T
Descripción Electrónicos  Stellaris짰 LM3S8962 Microcontroller
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Fabricante Electrónico  TI [Texas Instruments]
Página de inicio  http://www.ti.com
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LM3S8962-EQN80-A2T Datasheet(HTML) 4 Page - Texas Instruments

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6.1.2
Reset Control ................................................................................................................ 73
6.1.3
Power Control ............................................................................................................... 76
6.1.4
Clock Control ................................................................................................................ 78
6.1.5
System Control ............................................................................................................. 83
6.2
Initialization and Configuration ....................................................................................... 84
6.3
Register Map ................................................................................................................ 85
6.4
Register Descriptions .................................................................................................... 86
7
Hibernation Module .............................................................................................. 140
7.1
Block Diagram ............................................................................................................ 141
7.2
Functional Description ................................................................................................. 141
7.2.1
Register Access Timing ............................................................................................... 141
7.2.2
Clock Source .............................................................................................................. 142
7.2.3
Battery Management ................................................................................................... 143
7.2.4
Real-Time Clock .......................................................................................................... 143
7.2.5
Non-Volatile Memory ................................................................................................... 144
7.2.6
Power Control ............................................................................................................. 144
7.2.7
Initiating Hibernate ...................................................................................................... 144
7.2.8
Interrupts and Status ................................................................................................... 145
7.3
Initialization and Configuration ..................................................................................... 145
7.3.1
Initialization ................................................................................................................. 145
7.3.2
RTC Match Functionality (No Hibernation) .................................................................... 145
7.3.3
RTC Match/Wake-Up from Hibernation ......................................................................... 146
7.3.4
External Wake-Up from Hibernation .............................................................................. 146
7.3.5
RTC/External Wake-Up from Hibernation ...................................................................... 146
7.4
Register Map .............................................................................................................. 146
7.5
Register Descriptions .................................................................................................. 147
8
Internal Memory ................................................................................................... 160
8.1
Block Diagram ............................................................................................................ 160
8.2
Functional Description ................................................................................................. 160
8.2.1
SRAM Memory ............................................................................................................ 160
8.2.2
Flash Memory ............................................................................................................. 161
8.3
Flash Memory Initialization and Configuration ............................................................... 162
8.3.1
Flash Programming ..................................................................................................... 162
8.3.2
Nonvolatile Register Programming ............................................................................... 163
8.4
Register Map .............................................................................................................. 164
8.5
Flash Register Descriptions (Flash Control Offset) ......................................................... 165
8.6
Flash Register Descriptions (System Control Offset) ...................................................... 173
9
General-Purpose Input/Outputs (GPIOs) ........................................................... 186
9.1
Functional Description ................................................................................................. 186
9.1.1
Data Control ............................................................................................................... 187
9.1.2
Interrupt Control .......................................................................................................... 188
9.1.3
Mode Control .............................................................................................................. 189
9.1.4
Commit Control ........................................................................................................... 189
9.1.5
Pad Control ................................................................................................................. 189
9.1.6
Identification ............................................................................................................... 190
9.2
Initialization and Configuration ..................................................................................... 190
9.3
Register Map .............................................................................................................. 191
9.4
Register Descriptions .................................................................................................. 193
June 22, 2010
4
Texas Instruments-Production Data
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