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TPD6E001RSERG4 Datasheet(PDF) 2 Page - Texas Instruments |
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TPD6E001RSERG4 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 12 page www.ti.com IO5 IO6 GND IO2 IO3 IO4 IO1 V CC Absolute Maximum Ratings (1) TPD6E001 LOW-CAPACITANCE 6-CHANNEL ±15-kV ESD-PROTECTION ARRAY FOR HIGH-SPEED DATA INTERFACES SLLS685C – JULY 2006 – REVISED APRIL 2007 LOGIC BLOCK DIAGRAM PIN DESCRIPTION RSE NO. RSF NO. NAME FUNCTION 1, 2, 3, 1, 2, 3, IOx ESD-protected channel 6, 7, 8 7, 8, 9 5 5 GND Ground 10 11 VCC Power-supply input. Bypass VCC to GND with a 0.1-µF ceramic capacitor. 4, 9 4, 6, 10, 12 N.C. Not internally connected EP EP Exposed pad. Connect to GND. over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC –0.3 7 V VI/O –0.3 VCC + 0.3 V Tstg Storage temperature range –65 150 °C TJ Junction temperature 150 °C Infrared (15 s) 220 Bump temperature (soldering) °C Vapor phase (60 s) 215 Lead temperature (soldering, 10 s) 300 °C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2 Submit Documentation Feedback |
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