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TPS65070 Datasheet(PDF) 10 Page - Texas Instruments

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No. de pieza TPS65070
Descripción Electrónicos  Single Chip Power Solution for Battery Powered Systems
Download  93 Pages
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Fabricante Electrónico  TI [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI - Texas Instruments

TPS65070 Datasheet(HTML) 10 Page - Texas Instruments

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TPS65070, TPS65072, TPS65073
TPS650731, TPS650732
SLVS950B – JULY 2009 – REVISED DECEMBER 2009
www.ti.com
ADC CONVERTER
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Input voltage range at AD_IN1 to AD_IN4 pin
For full scale measurement
0
2.25
(channel 0 to channel 3)
VIN
Input voltage range internal channel 6 to channel 9
For full scale measurement
0
6
V
Input voltage range on channel4 (TS pin) and channel5
Unipolar measurement of charge current at pin
0
2.25
(ISET pin)
ISET (voltage at ISET)
Iin
AD_IN1 to AD_IN4 input current
0.1
4
μA
Cin
Input capacitance at AD_IN1 to AD_IN4
15
pF
ADC resolution
10
Bits
Differential linearity error
±1
LSB
Offset error
1
5
LSB
Gain error
±8
LSB
Sampling time
220
Conversion time
19
Wait time after enable
Time needed to stabilize the internal voltages
1.5
ms
includes current needed for I2C block
500
μA
Quiescent current, ADC enabled by I2C
Quiescent current, conversion ongoing
1
mA
Reference voltage output on pin BYPASS
–1%
2.260
1%
V
Output current on reference output pin BYPASS
0.1
mA
TOUCH SCREEN INTERFACE
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VTSREF
Voltage at internal voltage regulator for TSC
2.30
V
TOUCHSCREEN PANEL SPECIFICATIONS
Plate resistance X
Specified by design
200
400
1200
Plate resistance Y
Specified by design
200
400
1200
Resistance between plates contact
180
400
1000
Resistance between plates pressure
180
400
1000
Settling time
Position measurement; 400
Ω, 100 pF
5.5
μs
Capacitance between plates
2
10
nF
Total capacitance at pins TSX1,TSX2,TSY1,TSY2 to GND
100
pF
internal TSC reference resistance
20.9
22
23.1
k
SWITCH MATRIX SPECIFICATIONS
Tgate resistance
Specified by design
111
160
230
PMOS resistance
Specified by design
20
NMOS resistance
Specified by design
20
in TSC standby mode with TSC_M[2..0] =
Quiescent supply current
10
μA
101
POWER PATH
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
QUIESCENT CURRENT
Current into AC or USB, AC or USB selected,
IQSPP1
Quiescent current, AC or USB mode
20
μA
no load at SYS
INPUT SUPPLY
Minimum battery voltage for BAT SWITCH
VBATMIN
No input power, BAT_SWITCH on
2.75
V
operation
AC detected when V(AC)–V(BAT) > VIN(DT) ;
VIN(DT)
Input voltage detection threshold
USB detected when
150
mV
V(USB)–V(BAT) > VIN(DT)
AC not detected when V(AC)–V(BAT) <
VIN(NDT)
Input Voltage removal threshold
VIN(NDT) ; USB not detected when
75
mV
V(USB)–V(BAT) < VIN(NDT)
Activated based on settings in CHGCONFIG3
IDISCH
Internal discharge current at AC and USB input
95
μA
Bit 0 and Bit 7
10
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Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TPS65070 TPS65072 TPS65073 TPS650731, TPS650732


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