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MC68HC11C0FN3 Datasheet(PDF) 11 Page - Freescale Semiconductor, Inc |
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MC68HC11C0FN3 Datasheet(HTML) 11 Page - Freescale Semiconductor, Inc |
11 / 76 page MC68HC11C0 MOTOROLA MC68HC11C0TS/D 11 3 On-Chip Memory The MC68HC11C0 has 256 bytes of RAM. A 1024-byte block of bootstrap ROM is present in single- chip, bootstrap, and test modes. The following paragraphs describe the memory systems of this MCU. 3.1 Memory Map and Register Block The INIT register control the location of the registers in the 64-Kbyte CPU address space. The 128-byte register block originates at $0000 after reset and can be placed at any 1-Kbyte boundary by writing an appropriate value to the INIT register. The INIT register can be written only in the first 64 cycles after reset. If the register block and RAM are placed at the same 1-Kbyte boundary, the first 128 bytes of RAM are inaccessible. This is due to an on-chip hardware priority scheme which eliminates conflicts which could arise from multiple resources sharing address locations. Refer to the memory map dia- gram. Can be written only once in first 64 cycles in expanded and single-chip modes or at any time in other modes. REG[15:10] — Internal Register Map Position These bits determine the upper six bits of the register block address. At reset registers are mapped to $0000–$007F. Refer to the memory map diagram. INIT — Register Mapping $003D Bit 7 654321 Bit 0 REG15 REG14 REG13 REG12 REG11 REG10 — — RESET: 0 0000000 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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