KM68512ALI-L datasheet(6/9 Pages) SAMSUNG

No. de pieza	KM68512ALI-L

Descripción Electrónicos	64Kx8 bit Low Power CMOS Static RAM

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Fabricante Electrónico	SAMSUNG [Samsung semiconductor]

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KM68512A Family

CMOS SRAM

Revision 4.0

January 1997

6

Address

Data Out

Previous Data Valid

Data Valid

TIMMING DIAGRAMS

TIMING WAVEFORM OF READ CYCLE(1) (Address Controlled, CS1=OE=VIL, WE=VIH)

tAA

tRC

tOH

TIMING WAVEFORM OF READ CYCLE(2) (WE=VIH)

Data Valid

High-Z

CS1

Address

OE

Data out

NOTES (READ CYCLE)

1.

tHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage

levels.

2. At any given temperature and voltage condition,

tHZ(Max.) is less than tLZ(Min.) both for a given device and from device to device

interconnection.

CS2

tOH

tAA

tOLZ

tLZ

tOHZ

tHZ(1,2)

tRC

tCO2

tOE

tCO1

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KM68512ALI-L Datasheet(PDF) 6 Page - Samsung semiconductor

KM68512ALI-L Datasheet(HTML) 6 Page - Samsung semiconductor

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