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S524A40X21 Datasheet(PDF) 3 Page - Samsung semiconductor |
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S524A40X21 Datasheet(HTML) 3 Page - Samsung semiconductor |
3 / 16 page DATA SHEET S524A40X11/40X21/40X41/60X81/60X51 SERIAL EEPROM 1-3 S524A40X11/40X21/ 40X41/60X81/60X51 VCC WP SCL SDA A0 A1 A2 VSS NOTE: The S524A40X11/40X21/40X41/60X81/60X51 is available in 8-pin DIP, SOP, and TSSOP package. Figure 1-2. Pin Assignment Diagram Table 1-1. S524A40X11/40X21/40X41/60X81/60X51 Pin Descriptions Name Type Description Circuit Type A0, A1, A2 Input Input pins for device address selection. To configure a device address, these pins should be connected to the V CC or VSS of the device. These pins are internally pulled down to V SS. 1 V SS – Ground pin. – SDA I/O Bi-directional data pin for the I 2C-bus serial data interface. Schmitt trigger input and open-drain output. An external pull-up resistor must be connected to V CC. Typical values for this pull-up resistor are 4.7 kΩ (100 kHz) and 1 k Ω (400 kHz). 3 SCL Input Schmitt trigger input pin for serial clock input. 2 WP Input Input pin for hardware write protection control. If you tie this pin to V CC, the write function is disabled to protect previously written data in the entire memory; if you tie it to V SS, the write function is enabled. This pin is internally pulled down to V SS. 1 V CC – Single power supply. – NOTE: See the following page for diagrams of pin circuit types 1, 2, and 3. |
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