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ISL22449WFV14Z Datasheet(PDF) 9 Page - Intersil Corporation |
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ISL22449WFV14Z Datasheet(HTML) 9 Page - Intersil Corporation |
9 / 13 page 9 FN6333.3 July 17, 2009 SERIAL DATA INPUT (SDI) The SDI is the serial data input pin for the SPI interface. It receives device address, operation code, wiper address and data from the SPI external host device. The data bits are shifted in at the rising edge of the serial clock SCK, while the CS input is low. CHIP SELECT (CS) CS LOW enables the ISL22449, placing it in the active power mode. A HIGH to LOW transition on CS is required prior to the start of any operation after power up. When CS is HIGH, the ISL22449 is deselected and the SDO pin is at high impedance, and (unless an internal write cycle is underway) the device will be in the standby state. Principles of Operation The ISL22449 is an integrated circuit incorporating four DCPs with its associated registers, non-volatile memory and the SPI serial interface providing direct communication between host and potentiometers and memory. The resistor array is comprised of individual resistors connected in series. At either end of the array and between each resistor is an electronic switch that transfers the potential at that point to the wiper. The electronic switches on the device operate in a “make before break” mode when the wiper changes tap positions. When the device is powered down, the last value stored in IVRi will be maintained in the non-volatile memory. When power is restored, the contents of the IVRi is recalled and loaded into the corresponding WRi to set the wiper to the initial value. DCP Description Each DCP is implemented with a combination of resistor elements and CMOS switches. The physical ends of each DCP are equivalent to the fixed terminals of a mechanical potentiometer and internally connected to Vcc and GND. The RW pin of each DCP is connected to intermediate nodes, and is equivalent to the wiper terminal of a mechanical potentiometer. The position of the wiper terminal within the DCP is controlled by volatile Wiper Register (WR). Each DCP has its own WR. When the WR of a DCP contains all zeroes (WR[6:0]= 00h), its wiper terminal (RW) is closest to GND. When the WR register of a DCP contains all ones (WR[6:0]= 7Fh), its wiper terminal (RW) is closest to VCC. As the value of the WR increases from all zeroes (0) to all ones (127 decimal), the wiper moves monotonically from the position closest to GND to the closest to VCC. While the ISL22449 is being powered up, all four WRs are reset to 40h (64 decimal), which locates RW roughly at the center between GND and VCC. After the power supply voltage becomes large enough for reliable non-volatile memory reading, all WRs will be reload with the value stored in corresponding non-volatile Initial Value Registers (IVRs). The SPI interface register address bits have to be set to 0000b, 0001b, 0010b or 0011b to access the WR of DCP0, DCP1, DCP2 or DCP3 respectively. The WRi and IVRi can be read or written to directly using the SPI serial interface as described in the following sections. Memory Description The ISL22449 contains seven non-volatile and five volatile 8- bit registers. The memory map of ISL22449 is on Table 1. The four non-volatile registers (IVRi) at address 0, 1, 2 and 3, contain initial wiper value and volatile registers (WRi) contain current wiper position. In addition, three non-volatile General Purpose registers from address 4 to address 6 are available. The non-volatile IVRi and volatile WRi registers are accessible with the same address. The Access Control Register (ACR) contains information and control bits described below in Table 2. The VOL bit (ACR[7]) determines whether the access is to wiper registers WR or initial value registers IVR. If VOL bit is 0, the non-volatile IVR register is accessible. If VOL bit is 1, only the volatile WRi is accessible. Note, value is written to IVRi register also is written to the WRi. The default value of this bit is 0. The SHDN bit (ACR[6]) disables or enables Shutdown mode. This bit is logically AND with SHDN pin. When this bit is 0, DCPs are in Shutdown mode. Default value of SHDN bit is 1. The WIP bit (ACR[5]) is read only bit. It indicates that non- volatile write operation is in progress. The WIP bit can be read repeatedly after a non-volatile write to determine if the write has been completed. It is impossible to write to the IVRi, WRi or ACR while WIP bit is 1. Shutdown Mode The device can be put in Shutdown mode either by pulling the SHDN pin to GND or setting the SHDN bit in the ACR register to 0. The truth table for Shutdown mode is in Table 3. TABLE 1. MEMORY MAP ADDRESS NON-VOLATILE VOLATILE 8— ACR 7 Reserved 6 5 4 General Purpose General Purpose General Purpose Not Available Not Available Not Available 3 2 1 0 IVR3 IVR2 IVR1 IVR0 WR3 WR2 WR1 WR0 TABLE 2. ACCESS CONTROL REGISTER (ACR) BIT # 7 6 5 432 1 0 Bit Name VOL SHDN WIP 000 0 0 ISL22449 |
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