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ADUM3472 Datasheet(PDF) 8 Page - Analog Devices |
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ADUM3472 Datasheet(HTML) 8 Page - Analog Devices |
8 / 32 page ADuM3470/ADuM3471/ADuM3472/ADuM3473/ADuM3474 Rev. 0 | Page 8 of 32 Parameter Symbol Min Typ Max Unit Test Conditions/Comments Logic High Output Voltages VOAH, VOBH, VOCH, VODH VCC − 0.3, VISO − 0.3 5.0 V IOx = −20 μA, VIx = VIxH VCC − 0.5, VISO − 0.3 4.8 V IOx = −4 mA, VIx = VIxH Logic Low Output Voltages VOAL, VOBL, VOCL, VODL 0.0 0.1 V IOx = 20 μA, VIx = VIxL 0.0 0.4 V IOx = 4 mA, VIx = VIxL AC SPECIFICATIONS ADuM347xARWZ Minimum Pulse Width PW 1000 ns CL = 15 pF, CMOS signal levels Maximum Data Rate 1 Mbps CL = 15 pF, CMOS signal levels Propagation Delay tPHL, tPLH 55 100 ns CL = 15 pF, CMOS signal levels Pulse Width Distortion, |tPLH − tPHL| PWD 40 ns CL = 15 pF, CMOS signal levels Propagation Delay Skew tPSK 50 ns CL = 15 pF, CMOS signal levels Channel-to-Channel Matching tPSKCD/tPSKOD 50 ns CL = 15 pF, CMOS signal levels ADuM347xCRWZ Minimum Pulse Width PW 40 ns CL = 15 pF, CMOS signal levels Maximum Data Rate 25 Mbps CL = 15 pF, CMOS signal levels Propagation Delay tPHL, tPLH 30 50 70 ns CL = 15 pF, CMOS signal levels Pulse Width Distortion, |tPLH − tPHL| PWD 8 ns CL = 15 pF, CMOS signal levels Change vs. Temperature 5 ps/°C CL = 15 pF, CMOS signal levels Propagation Delay Skew tPSK 15 ns CL = 15 pF, CMOS signal levels Channel-to-Channel Matching, Codirectional Channels tPSKCD 8 ns CL = 15 pF, CMOS signal levels Channel-to-Channel Matching, Opposing Directional Channels tPSKOD 15 ns CL = 15 pF, CMOS signal levels Output Rise/Fall Time (10% to 90%) tR/tF 2.5 ns CL = 15 pF, CMOS signal levels Common-Mode Transient Immunity at Logic High Output |CMH| 25 35 kV/μs VIx = VDD or VISO, VCM = 1000 V, transient magnitude = 800 V Common-Mode Transient Immunity at Logic Low Output |CML| 25 35 kV/μs VIx = 0 V, V = 1000 V, transient magnitude = 800 V Refresh Rate fr 1.0 Mbps 1 The contributions of supply current values for all four channels are combined at identical data rates. 2 The VISO supply current is available for external use when all data rates are below 2 Mbps. At data rates above 2 Mbps, the data I/O channels draw additional current proportional to the data rate. Additional supply current associated with an individual channel operating at a given data rate can be calculated as described in the section. The dynamic I/O channel load must be treated as an external load and included in the VISO power budget. Power Consumption onsumption 3 The power demands of the quiescent operation of the data channels was not separated from the power supply section. Efficiency includes the quiescent power consumed by the I/O channels as part of the internal power consumption. 4 This current is available for driving external loads at the VISO output. All channels are simultaneously driven at a maximum data rate of 25 Mbps with full capacitive load representing the maximum dynamic load conditions. Refer to the Power C section for calculation of available current at less than the maximum data rate. |
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Descripción similar - ADUM3472 |
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