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ADS1230IPWR Datasheet(PDF) 11 Page - Texas Instruments |
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ADS1230IPWR Datasheet(HTML) 11 Page - Texas Instruments |
11 / 29 page www.ti.com VOLTAGE REFERENCE INPUTS CLOCK SOURCES Z EFF + 1 2f MODCBUF Z EFF + 1 (2)(76.8kHz)(13fF) + 500MW CLK_DETECT Internal Oscillator MUX ToADC S S0 S1 EN CLKIN AVDD (1)f MOD =76.8kHz Z =500MW EFF (1) REFP REFN AVDD ESD Protection C BUF ADS1230 SBAS366A – OCTOBER 2006 – REVISED JULY 2007 (REFP, REFN) The ADS1230 can use an external clock source or The voltage reference used by the modulator is internal oscillator to accommodate a wide variety of generated from the voltage difference between REFP applications. Figure 20 shows the equivalent circuitry and REFN: VREF = REFP – REFN. The reference of the clock source. The CLK_DETECT block inputs use a structure similar to that of the analog determines whether the crystal oscillator/external inputs. In order to increase the reference input clock signal is applied to the CLKIN pin so that the impedance, a switching buffer circuitry is used to internal oscillator is bypassed or activated. When the reduce the input equivalent capacitance. The CLKIN pin frequency is above ~200kHz, the reference drift and noise impact ADC performance. In CLK_DETECT output goes low and shuts down the order to achieve best results, pay close attention to internal oscillator. When the CLKIN pin frequency is the reference noise and drift specifications. A below ~200kHz, the CLK_DETECT output goes high simplified diagram of the circuitry on the reference and activates the internal oscillator. It is highly inputs is shown in Figure 19. The switches and recommended to hard-wire the CLKIN pin to ground capacitors can be modeled approximately using an when the internal oscillator is chosen. effective impedance of: Where: fMOD = modulator sampling frequency (76.8kHz) CBUF = input capacitance of the buffer For the ADS1230: Figure 20. Equivalent Circuitry of the Clock Source An external clock may be used by driving the CLKIN pin directly. The Electrical Characteristics table shows the allowable frequency range. The clock input may be driven with 5V logic, regardless of the DVDD or AVDD voltage. Figure 19. Simplified Reference Input Circuitry ESD diodes protect the reference inputs. To prevent these diodes from turning on, make sure the voltages on the reference pins do not go below GND by more than 100mV, and likewise, do not exceed AVDD by 100mV: GND – 100mV < (REFP or REFN) < AVDD + 100mV Copyright © 2006–2007, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): ADS1230 |
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