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AMT203-0192-2000 Datasheet(PDF) 5 Page - CUI INC

No. de pieza AMT203-0192-2000
Descripción Electrónicos  12 BIT AB SOLUTE ENCODER
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Fabricante Electrónico  CUI [CUI INC]
Página de inicio  http://www.cui.com
Logo CUI - CUI INC

AMT203-0192-2000 Datasheet(HTML) 5 Page - CUI INC

  AMT203-0192-2000 Datasheet HTML 1Page - CUI INC AMT203-0192-2000 Datasheet HTML 2Page - CUI INC AMT203-0192-2000 Datasheet HTML 3Page - CUI INC AMT203-0192-2000 Datasheet HTML 4Page - CUI INC AMT203-0192-2000 Datasheet HTML 5Page - CUI INC AMT203-0192-2000 Datasheet HTML 6Page - CUI INC  
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APPLICATION NOTES
Encoder operational mode
• Initialization mode: At power up the encoder goes through an initiation and stabilization procedure.
This includes microprocessor stabilization and the program for combining Coarse
and Fine channel of the encoder for getting the absolute start position. This takes
less than 0.1 seconds.
• Tracking mode: Only the Fine channel is active and the MCU internal position register is updated with
data from Fine:
– MCU 12 bit position register is updated from Fine every 48 μs.
– For accurate position update without above time delay, outputs for incremental A quad B or Count
and Up/Dwn from the Fine channel are provided. These outputs are operational up to 8000 RPM
and there is no speed error. There is an acceleration error dependent on an internal filter constant
of about 100 μs.
– When using the incremental output there also is an Index output available, with one index pulse
per turn.
Serial Peripheral Interface Commands
The SPI or Serial Peripheral Interface Bus is a standard interface promoted by Motorola and Microchip among
others. It consists of 4 signals:
MOSI: Master Out Slave In
MISO: Master In Slave Out
SCK: Serial Clock
CSB: Chip Select (active low)
SPI BUS
The SPI bus runs full duplex and transfers multiples of 8 bits in a frame. The SPI type is the most common
(CPOL=0, CPHA=0), also known as Microwire. Data is captured on the rising edge of SCK and the output data is
changed after the falling edge of SCK.
Serial Peripheral Interface Bus (SPI) on AMT203
Figure 7: SPI BUS Timing Diagram
The msb data out on MISO is valid soon after CSB goes low. The MOSI data is valid soon after the falling edge of
SCK. The Encoder drives data out on MISO as long as CSB is low.
Normally, CSB goes low, then after 8 clocks the command is interpreted. CSB high resets the
clock counter, and terminates any command sequence.
SCK
MISO
MOSI
CSB
MSB
LSB
MSB
LSB
Setup
Terminology
MSB = most significant byte
LSB = least significant byte
msb = most significant bit
lsb = least significant bit
20050 SW 112th Ave. Tualatin, Oregon 97062
phone 503.612.2300
fax 503.612.2380 www.cui.com
PART NUMBER:
DESCRIPTION:
AMT203
12 BIT ABSOLUTE ENCODER


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