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TDA8133 Datasheet(PDF) 6 Page - STMicroelectronics |
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TDA8133 Datasheet(HTML) 6 Page - STMicroelectronics |
6 / 14 page Obsolete Product(s) - Obsolete Product(s) Circuit description TDA8133 6/14 3 Circuit description The TDA8133 and the TDA8133D are dual-voltage regulators with reset and disable functions. The two regulation parts are supplied from a single voltage reference circuit trimmed by zener zapping during EWS testing. Since the supply voltage of this voltage reference is connected to pin INPUT1 (VIN1), the second regulator will not work if pin INPUT1 is not supplied. The output stages are designed using a Darlington configuration with a typical dropout voltage of 1.2 V. The disable circuit will switch off pin OUTPUT2 if a voltage less than 0.8 V is applied to pin DISABLE. The reset circuit checks the voltage at pin OUTPUT1. If this voltage drops below VO1 - 0.25 V (4.85 V Typ.), the "a" comparator (Figure 4) rapidly discharges the external capacitor (Ce) and the reset output immediately switches to low. When the voltage at pin OUTPUT1 exceeds VO1 - 0.2 V (4.9 V Typ.), the VCe voltage increases linearly to the reference voltage (VREF = 2.5 V) corresponding to a reset pulse delay (tRD) as shown in Figure 5. Afterwards, the reset output returns to high. To avoid glitches in the reset output, the second comparator "b" has a large hysteresis (1.9 V). Figure 4. Reset diagram t RD C e 2.5V × 10 μA --------------------------- = OUTPUT1 REG VREF - + 50 a + - Ce VREF 0.6V b RESET 10 µA 3 VREF = 2.5 V |
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