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SMD1210 Datasheet(PDF) 5 Page - Diodes Incorporated

No. de pieza SMD1210
Descripción Electrónicos  60V HIGH ACCURACY BUCK/BOOST/BUCK-BOOST LED DRIVER CONTROLLER
Download  33 Pages
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Fabricante Electrónico  DIODES [Diodes Incorporated]
Página de inicio  http://www.diodes.com
Logo DIODES - Diodes Incorporated

SMD1210 Datasheet(HTML) 5 Page - Diodes Incorporated

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ZXLD1370
ZXLD1370
Document number: DS32165 Rev. 2 - 2
5 of 33
www.diodes.com
May 2010
© Diodes Incorporated
A Product Line of
Diodes Incorporated
Electrical Characteristics (Test conditions: VIN = VAUX = 12V, TA = 25°C, unless otherwise specified.)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Output Parameters
VFLAGL
FLAG pin low level output voltage
Output sinking 1mA
0.5
V
IFLAGOFF FLAG pin open-drain leakage current
VFLAG=40V
1
µA
VSTATUS
STATUS Flag no-load output voltage
(Note 5)
Normal operation
4.2
4.5
4.8
V
Out of regulation (VSHP out of range)
(Note 6)
3.3
3.6
3.9
VIN under-voltage (VIN < 5.6V)
3.3
3.6
3.9
Switch stalled (tON or tOFF> 100µs)
3.3
3.6
3.9
Over-temperature (TJ > 125°C)
1.5
1.8
2.1
Excess sense resistor current
(VSENSE > 0.32V)
0.6
0.9
1.2
RSTATUS Output impedance of STATUS output
Normal operation
10
k
Driver output (PIN GATE)
VGATEH High level output voltage
No load Sourcing 1mA
(Note 7)
10
11
V
VGATEL Low level output voltage
Sinking 1mA, (Note 8)
0.5
V
VGATECL High level GATE CLAMP voltage
VIN = VAU X= VISM = 18V
IGATE = 1mA
12.8
15
V
IGATE
Dynamic peak current available during
rise or fall of output voltage
Charging or discharging gate of
external switch with QG = 10nC and
400kHz
±300
mA
tSTALL
Time to assert ‘STALL’ flag and
warning on STATUS output
(Note 9)
GATE low or high
100
170
µs
LED Thermal control circuit (TADJ) parameters
VTADJH
Upper threshold voltage
Onset of output current reduction
(VTADJ falling)
560
625
690
mV
VTADJL
Lower threshold voltage
Output current reduced to <10% of
set value (VTADJ falling)
380
440
500
mV
ITADJ
TADJ pin Input current
VTADJ = 1.25V
1
µA
Notes:
5. In the event of more than one fault/warning condition occurring, the higher priority condition will take precedence. E.g. ‘Excessive coil current’ and
‘Out of regulation’ occurring together will produce an output of 0.9V on the STATUS pin. The voltage levels on the STATUS output assume the
Internal regulator to be in regulation and VADJ<=VREF. A reduction of the voltage on the STATUS pin will occur when the voltage on VIN is near the
minimum value of 6V.
6. Flag is asserted if VSHP<2.5V or VSHP>3.5V
7. GATE is switched to the supply voltage VAUX for low values of VAUX (i.e. between 6V and approximately 12V). For VAUX>12V, GATE is clamped
internally to prevent it exceeding 15V.
8. GATE is switched to PGND by an NMOS transistor
9. If tON exceeds tSTALL, the device will force GATE low to turn off the external switch and then initiate a restart cycle. During this phase, ADJ is
grounded internally and the SHP pin is switched to its nominal operating voltage, before operation is allowed to resume. Restart cycles will be
repeated automatically until the operating conditions are such that normal operation can be sustained. If tOFF exceeds tSTALL, the switch will remain
off until normal operation is possible.


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