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LC74789M Datasheet(PDF) 3 Page - Sanyo Semicon Device |
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LC74789M Datasheet(HTML) 3 Page - Sanyo Semicon Device |
3 / 23 page No. 5732-3/23 LC74789, 74789M, 74789JM Continued from preceding page. Pin No. Pin Name Function Notes 13 CVOUT Video signal output Composite video signal output 14 VSS2 Ground Ground connection (analog system ground) 15 CVIN Video signal input Composite video signal input 16 CVCR Video signal input SECAM chrominance signal input 17 VDD1 Power supply Power supply (+5 V: digital system power supply) Video signal input to the internal sync separator circuit (Used as either the horizontal 18 SYNIN Sync separator circuit input synchronizing signal or the composite synchronizing signal input when the internal sync separator circuit is not used.) 19 SEPC Sync separator circuit bias Internal sync separator circuit bias voltage monitor voltage 20 SEPOUT Composite synchronizing Internal sync separator circuit composite synchronizing signal output. Can be switched to signal output function as a signal (high, low, or ST. pulse) output by the SEL0 and MOD0 setting. Inputs the vertical synchronizing signal created by integrating the SEPOUT pin output signal. 21 SEPIN Vertical synchronizing signal input An integration circuit must be connected to the SEPOUT pin. This pin must be tied to VDD1 if unused. This pin can be switched to function as the frame signal input mode by setting SEL1 high. This is valid when CTL3 is set high. This input has hysteresis characteristics. 22 CDLR Background color phase Background color phase adjustment. Connect a resistor between this pin and ground. adjustment 23 RST Reset input System reset input. A pull-up resistor is built in and the input has hysteresis characteristics. 24 VDD1 Power supply (+5 V) Power supply (+5 V: digital system power supply) Note: Both VDD1 pins must be connected to the power supply. |
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