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ADS4142IRGZR Datasheet(PDF) 7 Page - Texas Instruments |
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ADS4142IRGZR Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 81 page  ADS4122, ADS4125 ADS4142, ADS4145 www.ti.com SBAS520A – FEBRUARY 2011 – REVISED MARCH 2011 ELECTRICAL CHARACTERISTICS: GENERAL Typical values are at +25 °C, AVDD = 1.8V, DRVDD = 1.8V, 50% clock duty cycle, and 0dB gain, unless otherwise noted. Minimum and maximum values are across the full temperature range: TMIN = –40°C to TMAX = +85°C, AVDD = 1.8V, and DRVDD = 1.8V. ADS4122/ADS4142 (65MSPS) ADS4125/ADS4145 (125MSPS) PARAMETER MIN TYP MAX MIN TYP MAX UNIT ANALOG INPUTS Differential input voltage range 2.0 2.0 VPP Differential input resistance (at dc); see Figure 102 > 1 > 1 M Ω Differential input capacitance; see Figure 103 4 4 pF Analog input bandwidth 550 550 MHz Analog input common-mode current (per input pin) 0.6 0.6 µA/MSPS Common-mode output voltage VCM 0.95 0.95 V VCM output current capability 4 4 mA DC ACCURACY Offset error –15 2.5 15 –15 2.5 15 mV Temperature coefficient of offset error 0.003 0.003 mV/ °C Gain error as a result of internal reference EGREF –2 2 –2 2 %FS inaccuracy alone Gain error of channel alone EGCHAN –0.2 –0.2 –1 %FS Temperature coefficient of EGCHAN 0.001 0.001 Δ%/°C POWER SUPPLY IAVDD 42 55 62 75 mA Analog supply current IDRVDD(1) Output buffer supply current 28.5 35.5 mA LVDS interface with 100 Ω external termination Low LVDS swing (200mV) IDRVDD Output buffer supply current 40 53 48 57 mA LVDS interface with 100 Ω external termination Standard LVDS swing (350mV) IDRVDD output buffer supply current(1)(2) CMOS interface(2) 15 23 mA 8pF external load capacitance fIN = 2.5MHz Analog power 76 112 mW Digital power, LVDS interface, low LVDS swing 52 66.5 mW Digital power CMOS interface(2) 27 41.5 mW 8pF external load capacitance fIN = 2.5MHz Global power-down 10 15 10 15 mW Standby 105 130 mW (1) The maximum DRVDD current with CMOS interface depends on the actual load capacitance on the digital output lines. Note that the maximum recommended load capacitance on each digital output line is 10pF. (2) In CMOS mode, the DRVDD current scales with the sampling frequency, the load capacitance on output pins, input frequency, and the supply voltage (see the CMOS Interface Power Dissipation section in the Application Information). Copyright © 2011, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s): ADS4122 ADS4125 ADS4142 ADS4145 |
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