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FAN3224T Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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FAN3224T Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 15 page January 2011 © 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN3278 • Rev. 1.0.0 FAN3278 30V PMOS-NMOS Bridge Driver Features 8V to 27V Optimum Operating Range Drives High-Side PMOS and Low-Side NMOS in Motor Control or Buck Step-Down Applications Output Drive-Voltage Magnitude Limited: < 13V for VDD up to 30V Biases Each Load Device OFF with a 100kΩ Resistor when VDD Below Operating Level Low-Voltage TTL Input Thresholds Peak Gate Drives at 12V: +1.5A Sink, -1.0A Source Internal Resistors Hold Driver Off When No Inputs Present 8-Lead SOIC Package Rated from –40°C to +125°C Ambient Applications Motor Control with PMOS / NMOS Half-Bridge Configuration Buck Converters with High-Side PMOS Device; 100% Duty Cycle Operation Possible Logic-Controlled Load Circuits with High-Side PMOS Switch Description The FAN3278 dual 1.5A gate driver is optimized to drive a high-side P-channel MOSFET and a low-side N-channel MOSFET in motor control applications operating from a voltage rail up to 27V. Internal circuitry limits the voltage applied to the gates of the external MOSFETs to 13V maximum. The driver has TTL input thresholds and provides buffer and level translation from logic inputs. Internal circuitry prevents the output switching devices from operating if the VDD supply voltage is below the IC operation level. Internal 100kΩ resistors bias the non-inverting output LOW and the inverting output to VDD to keep the external MOSFETs off during startup intervals when logic control signals may not be present. The FAN3278 driver incorporates MOSFET devices for the final output stage, providing high current throughout the MOSFET turn-on / turn-off transition to minimize switching loss. The internal gate-drive regulators provide optimum gate-drive voltage when operating from a rail of 8V to 27V. The FAN3278 can be driven from a voltage rail of less than 8V; however, its gate drive current is reduced. The FAN3278 has two independent ENABLE pins that default to ON if not connected. If the ENABLE pin for non-inverting channel A is pulled LOW, OUTA is forced LOW. If the ENABLE pin for inverting channel B is pulled LOW, OUTB is forced HIGH. If an input is left unconnected, internal resistors bias the inputs such that the external MOSFETs are OFF. Figure 1. Typical Application |
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