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TPS22920 Datasheet(PDF) 2 Page - Texas Instruments |
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TPS22920 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 16 page D D C C B B A A 2 1 1 2 LAZER MARKING VIEW BUMP VIEW YZP PACKAGE TPS22920 SLVSAY8 – JUNE 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING/ STATUS (2) Reel TPS22920YZPR –40°C to 85°C YZP (0.5mm pitch) _ _ _6Z_ Tape TPS22920YZPT (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. (2) The actual top-side marking has two preceding characters to denote year, month and one following character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, ● = Pb-free). Figure 2. Bump Assignments Bump Assignments (YZP Package) D GND ON C VOUT VIN B VOUT VIN A VOUT VIN 1 2 Pin Description TPS22920 PIN NAME DESCRIPTION YZP D1 GND Ground D2 ON Switch control input, active high. Do not leave floating A1, B1, C1 VOUT Switch output A2, B2, C2 VIN Switch input, bypass this input with a ceramic capacitor to ground 2 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TPS22920 |
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