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ISL59530IRZ Datasheet(PDF) 8 Page - Intersil Corporation

No. de pieza ISL59530IRZ
Descripción Electrónicos  16x16 Video Crosspoint
Download  26 Pages
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Fabricante Electrónico  INTERSIL [Intersil Corporation]
Página de inicio  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL59530IRZ Datasheet(HTML) 8 Page - Intersil Corporation

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8
FN6220.8
April 13, 2011
22
M3
VREF
DC-restore clamp reference input. In an AC-coupled configuration
(DC-restore clamp enabled), the sync tip of composite video inputs
will be restored to this level. Set to 0.3V to 0.7V for optimum
performance.
In an DC-coupled configuration (DC-restore clamp disabled), this pin
should be tied to ground.
Do not let the VREF pin float! A floating VREF pin drifts high and, if
the clamp function is enabled, will cause all of the outputs to
simultaneously try to drive ~4V DC into their 150
Ω loads.
9
J3
SLATCH
Serial Latch. Serial data is latched into ISL59530 on rising edge of
SLATCH.
11
K3
CLK
Serial data clock
18
L3
SDI
Serial data input
69
G3
SDO
Serial data output. Can be tied to SDI of another ISL59530 to enable
daisy-chaining of multiple devices.
2
H3
RESET
Reset input. Pull high then low to reset device, but not needed in
normal operation. Tie to ground in final application.
65
D3
VSDO
Power supply for SDO pin. Tie to +5V for a 0V to 5V SDO output
signal swing.
3, 6, 10, 14, 17, 24, 25,
28, 32, 40, 43, 46, 50,
53, 58, 61, 62, 67, 68
D4, E4, F4, G4, H4, J4,
K4, L4, M4, N4, P4, R4,
T4, U4, D5, D6, D7, D8,
D9, D10, D11, D12, D13,
D14, D15, D16, D17, U5,
U6, U7, U8, U9, U10,
U11, U12, U13, U14,
U15, U16, U17, E17, F17,
G17, H17, J17, K17, L17,
M17, N17, P17, R17, T17
VS
+5V power supply
1, 20, 23, 31, 35, 36, 37,
38, 39, 47, 54, 55, 66, 71
F6-R6, F7-R7, F8-R8,
F9-R9, F10-R10,
F11-R11, F12-R12,
F13-R13, F14-R14,
F15-R15
GND
Ground
V5, V6, V9
NC
No Connect - Do not electrically connect to anything, including
ground.
Pin Descriptions (Continued)
72 LD QFN
356 LD PBGA
NAME
DESCRIPTION
ISL59530


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