1.

General description

The 74AUP2G125 provides the dual non-inverting buffer/line driver with 3-state output.

The 3-state output is controlled by the output enable input (nOE). A HIGH level at pin nOE

causes the output to assume a high-impedance OFF-state. This device has the

input-disable feature, which allows floating input signals. The inputs are disabled when the

output enable input nOE) is HIGH.

Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall

circuitry disables the output, preventing a damaging backflow current through the device

when it is powered down.

2.

Features and benefits

Wide supply voltage range from 0.8 V to 3.6 V

High noise immunity

Complies with JEDEC standards:

JESD8-12 (0.8 V to 1.3 V)

JESD8-11 (0.9 V to 1.65 V)

JESD8-7 (1.2 V to 1.95 V)

JESD8-5 (1.8 V to 2.7 V)

JESD8-B (2.7 V to 3.6 V)

ESD protection:

HBM JESD22-A114F Class 3A exceeds 5000 V

MM JESD22-A115-A exceeds 200 V

CDM JESD22-C101E exceeds 1000 V

Latch-up performance exceeds 100 mA per JESD78B Class II

Inputs accept voltages up to 3.6 V

Input-disable feature allows floating input conditions

Multiple package options

Specified from

−40 °Cto+85 °C and −40 °Cto+125 °C

74AUP2G125

Low-power dual buffer/line driver; 3-state

Rev. 7 — 21 September 2010

Product data sheet