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SM802123UMGTR Datasheet(PDF) 2 Page - Micrel Semiconductor |
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SM802123UMGTR Datasheet(HTML) 2 Page - Micrel Semiconductor |
2 / 12 page Micrel, Inc. SM802123 January 2012 2 M9999-012312-A hbwhelp@micrel.com or (408) 955-1690 Ordering Information Part Number Marking Shipping Junction Temperature Range (1) Package SM802123UMG 802123 Tray –40°C to +85°C 44-Pin QFN SM802123UMGTR 802123 Tape and Reel –40°C to +85°C 44-Pin QFN Note: 1. Devices are Green, RoHS, and PFOS compliant. Pin Configuration 44-Pin QFN (Top View) Pin Description Pin Number Pin Name Pin Type Pin Level Pin Function 25, 26 28, 29 32, 33 35, 36 Q1, Q2 Q3, Q4 /Q5, /Q6 /Q7, /Q8 O, (DIF) LVCMOS Clock Outputs from Bank 1 (25MHz) . 41, 42 1, 2 4, 5 7, 8 Q9, Q10 /Q11, /Q12 /Q13, /Q14 Q15, Q16 O, (DIF) LVCMOS Clock Outputs from Bank 2 (125MHz). 31, 37, 38 VDDO1 PWR Power Supply for the Outputs on Bank 1. 43, 44, 16 VDDO2 PWR Power Supply for the Outputs on Bank 2. 24, 39 VSSO1 PWR Power Supply Ground for the Outputs on Bank 1. 3, 6, 40 VSSO2 PWR Power Supply Ground for the Outputs on Bank 2. 11, 14, 18, 19, 20, 27, 30, 34 TEST Factory Test Pins. Do not connect anything to these pins. 12, 13 VDD PWR Core Power Supply. 10, 21, 23 VSS (Exposed Pad) PWR Core Power Supply Ground. The exposed pad must be connected to the VSS ground plane. |
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