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AMS73CAG01168RAUJI9 Datasheet(PDF) 11 Page - Advanced Monolithic Systems Ltd

No. de pieza AMS73CAG01168RAUJI9
Descripción Electrónicos  HIGH PERFORMANCE 1Gbit DDR3 SDRAM
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Fabricante Electrónico  AMS [Advanced Monolithic Systems Ltd]
Página de inicio   http://www.ams-semitech.com
Logo AMS - Advanced Monolithic Systems Ltd

AMS73CAG01168RAUJI9 Datasheet(HTML) 11 Page - Advanced Monolithic Systems Ltd

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11
AMS73CAG01808RA Rev. 1.0 December 2010
Command Truth Table
(a) Note 1,2,3,4 apply to the entire Command truth table
(b) Note 5 applies to all Read/Write commands.
[BA=Bank Address, RA=Row Address, CA=Column Address, BC=Burst Chop, X=Don’t care, V=Valid]
Note :
1. All DDR3 SDRAM commands are defined by states of CS, RAS, CAS, WE and CKE at the rising edge of the clock. The MSB of BA, RA, and CA are
device density and configuration dependant
2. RESET is Low enable command which will be used only for asynchronous reset so must be maintained HIGH during any function.
3. Bank addresses (BA) determine which bank is to be operated upon. For (E)MRS BA selects an (Extended) Mode Register
4. “V” means “H or L (but a defined logic level)” and “X” means either “defined or undefined (like floating) logic level”
5. Burst reads or writes cannot be terminated or interrupted and Fixed/on the fly BL will be defined by MRS
6. The Power Down Mode does not perform any refresh operations.
7. The state of ODT does not affect the states described in this table. The ODT function is not available during Self Refresh.
8. Self refresh exit is asynchronous.
9. VREF(Both VREFDQ and VREFCA) must be maintained during Self Refresh operation.
10. The No Operation command should be used in cases when the DDR3 SDRAM is in an idle or a wait state. The purpose of the No Operation
command (NOP) is to prevent the DDR3 SDRAM from registering any unwanted commands between operations. A No Operation command will not
terminate a previous operation that is still executing, such as a burst read or write cycle.
11. The Deselect command performs the same function as a No Operation command.
12. Refer to the CKE Truth Table for more detail with CKE transition
Function
Abbreviation
CKE
CS
RAS CAS
WE
BA0
-
BA2
A13
-
A15
A12
/
BC
A10
/
AP
A0
-
A9,A11
Notes
Previous
Cycle
Current
Cycle
Mode Register Set
MRS
H
H
L
L
L
L
BA
OP Code
Refresh
REF
H
H
L
L
L
H
V
V
V
V
V
Self Refresh Entry
SRE
H
L
L
L
L
H
V
V
V
V
V
7,9,12
Self Refresh Exit
SRX
L
H
H
V
V
V
XX
XX
X
7,8,9,12
LH
H
H
V
V
V
V
V
Single Bank Precharge
PRE
H
H
L
L
H
L
BA
V
V
L
V
Precharge all Banks
PREA
H
H
L
L
H
L
V
V
V
H
V
Bank Activate
ACT
H
H
L
L
H
H
BA
Row Address (RA)
Write (Fixed BL8 or BL4)
WR
H
H
L
H
L
L
BA
RFU
V
L
CA
Write (BL4, on the Fly)
WRS4
H
H
L
H
L
L
BA
RFU
L
L
CA
Write (BL8, on the Fly)
WRS8
H
H
L
H
L
L
BA
RFU
H
L
CA
Write with Auto Precharge
(Fixed BL8 or BL4)
WRA
H
H
L
H
L
L
BA
RFU
V
H
CA
Write with Auto Precharge
(BL4, on the Fly)
WRAS4
H
H
L
H
L
L
BA
RFU
L
H
CA
Write with Auto Precharge
(BL8, on the Fly)
WRAS8
H
H
L
H
L
L
BA
RFU
H
H
CA
Read (Fixed BL8 or BL4)
RD
H
H
L
H
L
H
BA
RFU
V
L
CA
Read (BL4, on the Fly)
RDS4
H
H
L
H
L
H
BA
RFU
L
L
CA
Read (BL8, on the Fly)
RDS8
H
H
L
H
L
H
BA
RFU
H
L
CA
Read with Auto Precharge
(Fixed BL8 or BL4)
RDA
H
H
L
H
L
H
BA
RFU
V
H
CA
Read with Auto Precharge
(BL4, on the Fly)
RDAS4
H
H
L
H
L
H
BA
RFU
L
H
CA
Read with Auto Precharge
(BL8, on the Fly)
RDAS8
H
H
L
H
L
H
BA
RFU
H
H
CA
No Operation
NOP
H
H
L
H
H
H
V
V
V
V
V
10
Device Deselected
DES
H
H
H
X
X
X
X
X
X
X
X
11
ZQ calibration Long
ZQCL
H
H
L
H
H
L
X
X
X
H
X
ZQ calibration Short
ZQCS
H
H
L
H
H
L
X
X
X
L
X
Power Down Entry
PDE
H
L
LH
H
H
V
V
V
V
V
6,12
H
V
X
X
XX
XX
X
Power Down Exit
PDX
L
H
LH
H
H
V
V
V
V
V
6,12
H
X
X
X
XX
XX
X
AMS73CAG01808RA


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