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ADS1203IPWR Datasheet(PDF) 3 Page - Texas Instruments

No. de pieza ADS1203IPWR
Descripción Electrónicos  Motor control, current measurement
Download  33 Pages
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI1 - Texas Instruments

ADS1203IPWR Datasheet(HTML) 3 Page - Texas Instruments

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ADS1203
SBAS318C − JUNE 2004 − REVISED JANUARY 2008
www.ti.com
3
ELECTRICAL CHARACTERISTICS
Over recommended operating free-air temperature range at −40
°C to +125°C, AVDD = BVDD = +5V or VDD = +5V, VIN+ = −250mV to +250mV,
VIN− = 0V, Mode 3, MCLK input = 20MHz, and 16-bit Sinc3 filter, with OSR = 256, unless otherwise noted.
ADS1203I
PARAMETER
TEST CONDITIONS
MIN
TYP(1)
MAX
UNITS
Resolution
16
Bits
DC Accuracy
INL
Integral linearity error(2)
±1
±4
LSB
INL
Integral linearity error(2)
TA = −40°C to +85°C
±3
LSB
DNL
Differential nonlinearity(3)
±1
LSB
VOS
Input offset(4)
±220
±1000
µV
TCVOS
Input offset drift
±3.5
±8
µV/°C
GERR
Gain error(4)
REFIO = internal 2.5V
±0.2
±1.4
%
GERR
Gain error(4)
REFIO = internal 2.5V, TA = −40°C to +85°C
−1
1
%
TCGERR
Gain error drift
±30
ppm/
°C
TCGERR
Gain error drift
TA = −40°C to +85°C
±20
ppm/
°C
PSRR
Power-supply rejection ratio
4.5V < AVDD or VDD < 5.5V
80
dB
Analog Input
FSR
Full-scale differential range
(VIN+) − (VIN−)
±320
mV
Operating common-mode
signal(3)
−0.1
5
V
Input capacitance
Common-mode
3
pF
Input leakage current
±16
nA
Input leakage current
TA = −40°C to +85°C
±1
nA
Differential input resistance
Equivalent
28
k
Differential input capacitance
5
pF
CMRR
Common-mode rejection ratio
At DC
92
dB
CMRR
Common-mode rejection ratio
VIN = 0V to 5V at 50kHz
105
dB
Internal Clock for Modes 0, 1, and 2
Clock frequency
8.7
10
11
MHz
Clock frequency
TA = −40°C to +85°C
9
11
MHz
External Clock for Mode 3
Clock frequency(5)
16
20
24
MHz
(1) All typical values are at T
A = +25
°C.
(2) Integral nonlinearity is defined as the maximum deviation of the line through the end points of the specified input range of the transfer curve
for VIN+ = −250mV to +250mV, expressed either as the number of LSBs or as a percent of measured input range (500mV).
(3) Ensured by design.
(4) Maximum values, including temperature drift, are ensured over the full specified temperature range.
(5) With reduced accuracy, the supported external clock frequency range is 1MHz up to 32MHz.
(6) Available only for QFN package.
(7) Applicable for 5.0V nominal supply: BV
DD = 4.5V to 5.5V.
(8) Applicable for 3.0V nominal supply: BV
DD = 2.7V to 3.6V.
(9) Measured with CLKOUT pin not loaded.


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