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ADC1210S065HN-C1 Datasheet(PDF) 10 Page - Integrated Device Technology

No. de pieza ADC1210S065HN-C1
Descripción Electrónicos  Single 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs
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Fabricante Electrónico  IDT [Integrated Device Technology]
Página de inicio  http://www.idt.com
Logo IDT - Integrated Device Technology

ADC1210S065HN-C1 Datasheet(HTML) 10 Page - Integrated Device Technology

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[1]
Typical values measured at VDDA =3V, VDDO =1.8 V, Tamb =25 C and CL = 5 pF; minimum and maximum values are across the full temperature range Tamb = 40 C to +85 C
at VDDA =3V, VDDO = 1.8 V; VINP  VINM = 1 dBFS; internal reference mode; applied to CMOS and LVDS interface; unless otherwise specified.
[2]
Measured between 20 % to 80 % of VDDO.
[3]
Rise time measured from
50 mV to +50 mV; fall time measured from +50 mV to 50 mV.
LVDS DDR mode timing output: pins D10_D11_P to D0_D1_P, D10_D11_M to D0_D1_M, DAVP and DAVM
tPD
propagation
delay
DATA
3.3
5.1
7.6
2.9
4.6
7.1
2.5
4.2
6.8
2.2
4.0
6.6
ns
DAV
-
2.8
-
-
2.5
-
-
2.3
-
-
2.2
-
ns
tsu
set-up time
-
5.4
-
-
4.1
-
-
2.6
-
-
1.9
-
ns
th
hold time
-
2.2
-
-
2.0
-
-
1.8
-
-
1.7
-
ns
tr
rise time
DATA
[3]
0.5
-
5
0.5
-
5
0.5
-
5
0.5
-
5
ns
DAV
0.18
-
2.40.18
-
2.40.18
-
2.40.18
-
2.4
ns
tf
fall time
DATA
[3]
0.15
-
1.6
0.15
-
1.6
0.15
-
1.6
0.15
-
1.6
ns
Table 8.
Clock input and digital output timing characteristics[1] …continued
Symbol
Parameter
Conditions
ADC1210S065
ADC1210S080
ADC1210S105
ADC1210S125
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max


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