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ADC1443D Datasheet(PDF) 2 Page - Integrated Device Technology |
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ADC1443D Datasheet(HTML) 2 Page - Integrated Device Technology |
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2 / 49 page  ADC1443D_SER © IDT 2012. All rights reserved. Objective data sheet Rev. 03 — 19 July 2012 2 of 49 Integrated Device Technology ADC1443D series Dual 14-bit ADC; 125, 160 or 200 Msps; JESD204A/B serial outputs 3. Applications 4. Ordering information Two JESD204B serial output lanes, up to 5 Gbps typical Pin to pin compatible with ADC1413D series Single 1.8 V supply Power-down and sleep modes Flexible input voltage range from 1 V (p-p) to 2 V (p-p) by 1 dB steps Industrial temperature range from 40 C to +85 C Clock input divider from 1 to 8 supports harmonic clocking Serial Peripheral Interface (SPI) for configuration control and status monitoring Duty Cycle Stabilizer (DCS) HLQFN56 package; 8 8mm Offset binary and two’s complement output data Wireless infrastructure: LTE, TD-LTE, WiMAX, MC-GSM, CDMA, WCDMA, TD-SCDMA Microwave backhaul transceivers Software defined radio Aerospace and defense communications and radar systems Medical non-invasive scanners Industrial signal analysis instruments Scientific particle detectors General-purpose high-speed applications Table 1. Ordering information Type number fs (Msps) Package Name Description Version ADC1443D200HD 200 HLQFN56 plastic thermal enhanced low profile quad flat package; no leads; 56 terminals; resin based; body 8 8 1.35 mm SOT935-2 ADC1443D160HD 160 HLQFN56 plastic thermal enhanced low profile quad flat package; no leads; 56 terminals; resin based; body 8 8 1.35 mm SOT935-2 ADC1443D125HD 125 HLQFN56 plastic thermal enhanced low profile quad flat package; no leads; 56 terminals; resin based; body 8 8 1.35 mm SOT935-2 |
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