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ISLA214P12IRZ Datasheet(PDF) 5 Page - Intersil Corporation |
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ISLA214P12IRZ Datasheet(HTML) 5 Page - Intersil Corporation |
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5 / 34 page  ISLA214P12 5 FN7982.2 June 27, 2012 Pin Descriptions - 72 Ld QFN, CMOS Mode PIN NUMBER CMOS PIN NAME CMOS PIN FUNCTION DDR MODE COMMENTS 1, 2, 16, 17, 28, 30, 33, 35, 37, 39, 41, 43, 47, 49, 51, 53, 55, 57, 59, 63 DNC Do Not Connect 6, 13, 19, 20, 21, 70, 71, 72 AVDD 1.8V Analog Supply 5, 7, 12, 14 AVSS Analog Ground 27, 32, 62 OVDD 1.8V Output Supply 26, 45, 61, 65 OVSS Output Ground 3 NAPSLP Tri-Level Power Control (Nap, Sleep modes) 4 VCM Common Mode Output 8, 9 VINN Analog Input Negative 10, 11 VINP Analog Input Positive 15 CLKDIV Tri-Level Clock Divider Control 18 RESETN Power On Reset (Active Low) 22, 23 CLKP, CLKN Clock Input True, Complement 24, 25 CLKDIVRSTP, CLKDIVRSTN Synchronous Clock Divider Reset True, Complement 29 D13 CMOS Bit 13 (MSB) Output NC in DDR Mode 31 D12 CMOS Bit 12 Output DDR Logical Bits 12, 13 34 D11 CMOS Bit 11 Output NC in DDR Mode 36 D10 CMOS Bit 10 Output DDR Logical Bits 10, 11 38 D9 CMOS Bit 9 Output NC in DDR Mode 40 D8 CMOS Bit 8 Output DDR Logical Bits 8, 9 42 D7 CMOS Bit 7 Output NC in DDR Mode 44 D6 CMOS Bit 6 Output DDR Logical Bits 6, 7 46 RLVDS LVDS Bias Resistor (connect to OVSS with 1% 10k Ω) 48 CLKOUT CMOS Clock Output 50 D5 CMOS Bit 5 Output NC in DDR Mode 52 D4 CMOS Bit 4 Output DDR Logical Bits 4, 5 54 D3 CMOS Bit 3 Output NC in DDR Mode 56 D2 CMOS Bit 2 Output DDR Logical Bits 2, 3 58 D1 CMOS Bit 1 Output NC in DDR Mode 60 D0 CMOS Bit 0 (LSB) Output DDR Logical Bits 0, 1 64 OR CMOS Over Range DDR Over Range 66 SDO SPI Serial Data Output 67 CSB SPI Chip Select (active low) 68 SCLK SPI Clock 69 SDIO SPI Serial Data Input/Output Exposed Paddle AVSS Analog Ground |
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