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TPS54350MPWPREP Datasheet(PDF) 2 Page - Texas Instruments |
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TPS54350MPWPREP Datasheet(HTML) 2 Page - Texas Instruments |
2 / 36 page www.ti.com 50 55 60 65 70 75 80 85 90 95 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 EFFICIENCY vs LOAD CURRENT VI = 12 V VO = 5 V fS = 250 kHz IL − Load Current − A PH VIN PGND BOOT VSENSE COMP PWRPAD VBIAS ENA PWRGD Input Voltage Output Voltage LSG TPS54350 SYNC PACKAGE DISSIPATION RATINGS (1) (2) TPS54350-EP SGLS308 – OCTOBER 2005 SIMPLIFIED SCHEMATIC These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION TJ OUTPUT PACKAGE PART VOLTAGE NUMBER –55 °C to Adjustable to Plastic TPS54350MP 125 °C 0.891 V HTSSOP WPREP (PWP)(1) (1) The PWP package is also available taped and reeled. Add an R suffix to the device type (i.e., TPS54350PWPR). THERMAL IMPEDANCE TA = 25°C TA = 70°C TA = 85°C PACKAGE JUNCTION-TO-AMBIENT POWER RATING POWER RATING POWER RATING 16-Pin PWP with solder(3) 42.1 °C/W 2.36 1.31 0.95 16-Pin PWP without solder 151.9 °C/W 0.66 0.36 0.26 (1) See Figure 46 for power dissipation curves. (2) For more information, see the Texas Instruments technical brief SLMA002. (3) Test Board Conditions a. Thickness: 0.062 inch b. 3 inch x 3 inch c. 2 oz. Copper traces located on the top and bottom of the PCB for soldering d. Copper areas located on the top and bottom of the PCB for soldering e. Power and Ground planes, 1 oz. Copper (0.036 mm thick) f. Thermal vias, 0,33 mm diameter, 1,5 mm pitch g. Thermal isolation of power plane 2 |
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