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TPS72118MDBVREP Datasheet(PDF) 2 Page - Texas Instruments

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No. de pieza TPS72118MDBVREP
Descripción Electrónicos  LOW INPUT VOLTAGE, CAP FREE 150 mA LOW-DROPOUT (LDO) LINEAR REGULATOR
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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TPS72118MDBVREP Datasheet(HTML) 2 Page - Texas Instruments

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ABSOLUTE MAXIMUM RATINGS
PACKAGE DISSIPATION RATING
TPS72118-EP
SGDS037A – OCTOBER 2007 – REVISED DECEMBER 2007
This family of regulators is particularly suited as a portable power supply solution due to its minimal board space
requirement and 1.8 V minimum input voltage. Being able to use two off-the-shelf AAA batteries makes system
design easier and also reduces component cost. Moreover, the solution is more efficient than if a regulator with a
higher input voltage is used.
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
TJ
VOLTAGE
PACKAGE(2)
PART NUMBER
SYMBOL
–55
°C to 125°C
1.8 V
DBV
TPS72118MDBVREP(3)
CKZ
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2)
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3)
The DBVR indicates tape and reel of 3000 parts.
over operating free-air temperature range unless otherwise noted
(1) (2)
TPS72118
Voltage range at IN
–0.3 V to 7 V
Voltage range at EN
–0.3 V to 7 V
Voltage on OUT, FB, NC
–0.3 V to VI + 0.3 V
Peak output current
Internally limited
ESD rating, HBM
3 kV
Continuous total power dissipation
See Dissipation Rating Table
Operating junction temperature range, TJ
–55
°C to 150°C
Storage temperature range, Tstg
–65
°C to 150°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to network ground terminal.
(2)
All voltage values are with respect to network ground terminal.
DERATING FACTOR
TA ≤ 25°C
TA = 70°C
TA = 85°C
BOARD
PACKAGE
RΘJC
RΘJA
ABOVE TA = 25°C
POWER RATING
POWER RATING
POWER RATING
Low-K(1)
DBV
65.8
°C/W
259
°C/W
3.9 mW/
°C
386 mW
212 mW
154 mW
High-K(2)
DBV
65.8
°C/W
180
°C/W
5.6 mW/
°C
555 mW
305 mW
222 mW
(1)
The JEDEC Low-K (1s) board design used to derive this data was a 3 inch x 3 inch, two-layer board with 2-ounce copper traces on top
of the board.
(2)
The JEDEC High-K (2s2p) board design used to derive this data was a 3 inch x 3 inch, multilayer board with 1-ounce internal power and
ground planes and 2-ounce copper traces on top and bottom of the board.
2
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Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): TPS72118-EP


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