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TPS73534DRBR Datasheet(PDF) 10 Page - Texas Instruments |
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TPS73534DRBR Datasheet(HTML) 10 Page - Texas Instruments |
10 / 19 page TPS73534 SBVS164 – JUNE 2011 www.ti.com Shutdown Transient Response The enable pin (EN) is active high and is compatible As with any regulator, increasing the size of the with standard and low voltage TTL-CMOS levels. output capacitor reduces over/undershoot magnitude When shutdown capability is not required, EN can be but increases duration of the transient response. In connected to IN. the adjustable version, adding CFB between OUT and FB improves stability and transient response. The transient response of the TPS73534 is enhanced by Dropout Voltage an active pull-down that engages when the output The TPS73534 uses a PMOS pass transistor to overshoots by approximately 5% or more when the achieve low dropout. When (VIN – VOUT) is less than device is enabled. When enabled, the pull-down the dropout voltage (VDO), the PMOS pass device is device behaves like a 400 Ω resistor to ground. in its linear region of operation and the input-to-output resistance is the RDS, ON of the PMOS pass element. Undervoltage Lock-Out (UVLO) Because the PMOS device behaves like a resistor in dropout, VDO approximately scales with output The TPS73534 utilizes an undervoltage lock-out current. circuit to keep the output shut off until internal circuitry is operating properly. The UVLO circuit has a As with any linear regulator, PSRR and transient de-glitch feature so that it typically ignores response are degraded as (VIN – VOUT) approaches undershoot transients on the input if they are less dropout. This effect is shown in the Typical than 50 μs duration. Characteristics section. Minimum Load Startup and Noise Reduction Capacitor The TPS73534 is stable and well-behaved with no The TPS73534 uses a quick-start circuit to output load. To meet the specified accuracy, a fast-charge the noise reduction capacitor, CNR, if minimum load of 500 μA is required. Below 500μA at present (see the Functional Block Diagrams). This junction temperatures near +125 °C, the output can architecture allows the combination of very low output drift up enough to cause the output pull-down to turn noise and fast start-up times. The NR pin is high on. The output pull-down limits voltage drift to 5% impedance so a low leakage CNR capacitor must be typically but ground current could increase by used; most ceramic capacitors are appropriate in this approximately 50 μA. In typical applications, the configuration. junction cannot reach high temperatures at light loads because there is no appreciable dissipated power. Note that for fastest startup, VIN should be applied The specified ground current would then be valid at first, then the enable pin (EN) driven high. If EN is no load in most applications. tied to IN, startup is somewhat slower. Refer to the Typical Characteristics section. The quick-start switch is closed for approximately 135 μs. To ensure that CNR is fully charged during the quick-start time, a 0.01 μF or smaller capacitor should be used. 10 Copyright © 2011, Texas Instruments Incorporated |
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