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TPS781250200DDCT Datasheet(PDF) 2 Page - Texas Instruments |
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TPS781250200DDCT Datasheet(HTML) 2 Page - Texas Instruments |
2 / 26 page ABSOLUTE MAXIMUM RATINGS (1) DISSIPATION RATINGS TPS781 Series SBVS102B – MARCH 2008 – REVISED MAY 2008 ........................................................................................................................................................... www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION(1)(2) PRODUCT VOUT TPS781vvvxxxyyyz VVV is the nominal output voltage for VOUT(HIGH) and corresponds to VSET pin low. XXX is the nominal output voltage for VOUT(LOW) and corresponds to VSET pin high. YYY is the package designator. Z is the tape and reel quantity (R = 3000, T = 250). Adjustable version(3)(4) (1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (2) Additional output voltage combinations are available on a quick-turn basis using innovative, factory EPROM programming. Minimum-order quantities apply; contact your sales representative for details and availability. (3) To order the adjustable version, use TPS78101YYYZ. (4) The device is either fixed voltage, dual-level VOUT, or adjustable voltage only. Device design does not permit a fixed and adjustable output simultaneously. At TJ = –40°C to +125°C, unless otherwise noted. All voltages are with respect to GND. PARAMETER TPS781 Series UNIT Input voltage range, VIN –0.3 to +6.0 V Enable and VSET voltage range, VEN and VVSET –0.3 to VIN + 0.3 (2) V Output voltage range, VOUT –0.3 to VIN + 0.3V V Maximum output current, IOUT Internally limited Output short-circuit duration Indefinite Total continuous power dissipation, PDISS See the Dissipation Ratings table Human body model (HBM) 2 kV ESD rating Charged device model (CDM) 500 V Operating junction temperature range, TJ –40 to +125 °C Storage temperature range, TSTG –55 to +150 °C (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. (2) VEN and VVSET absolute maximum rating are VIN + 0.3V or +6.0V, whichever is less. DERATING FACTOR BOARD PACKAGE RθJC RθJA ABOVE TA = +25°C TA < +25°C TA = +70°C TA = +85°C High-K(1) DRV 20 °C/W 65 °C/W 15.4mW/ °C 1540mW 845mW 615mW High-K(1) DDC 90 °C/W 200 °C/W 5.0mW/ °C 500mW 275mW 200mW (1) The JEDEC high-K (2s2p) board used to derive this data was a 3-inch × 3-inch, multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on top and bottom of the board. 2 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated |
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