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TSM-110-01-L-DV-P Datasheet(PDF) 4 Page - Texas Instruments

No. de Pieza. TSM-110-01-L-DV-P
Descripción  Contains all support circuitry needed for the ADS1148/ADS1248
Descarga  34 Pages
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Fabricante  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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TSM-110-01-L-DV-P Datasheet(HTML) 4 Page - Texas Instruments

 
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Digital Interface
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All of the pins on J4 and J8 are connected with minimal filtering or protection. Use appropriate caution
when handling these pins. Table 1 summarizes the pinouts for analog interfaces J4 and J8.
Table 1. J8/J4: Analog Interface Pinout
Pin Number
Signal
Description, ADS1148/ADS1248
J8.1, J4-1
A0(
–)
AIN0
J8.2, J4-2
A0(+)
AIN1
J8.3, J4-3
A1(
–)
AIN2
J8.4, J4-4
A1(+)
AIN3
J8.5, J4-5
A2(
–)
AIN4
J8.6, J4-6
A2(+)
AIN5
J8.7, J4-7
A3(
–)
AIN6
J8.8, J4-8
A3(+)
AIN7
J8.18
REF
External reference source input (
side of differential input)
J8.20
REF+
External reference source input (+
side of differential input)
J8.10-16 (even)
Unused
J8.15
Unused
J8.9-19 (odd), J4-9
AGND
Analog ground connections
(except J8.15)
3
Digital Interface
3.1
Serial Data Interface
The ADS1248EVM is designed to easily interface with multiple control platforms. Samtec part numbers
SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a convenient 10-pin, dual-row, header/socket
combination at J7. This header/socket provides access to the digital control and serial data pins of the
ADC. Consult Samtec at http://www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating
connector options.
All logic levels on J7 are 3.3V CMOS, except for the I
2C™ pins. These pins conform to 3.3V I2C rules.
Table 2 describes the J7 serial interface pins.
Table 2. J7: Serial Interface Pins
Pin No.
Pin Name
Signal Name
I/O Type
Pullup
Function
J7.1
CNTL
CS
In
High
J7.2
GPIO0
START
In
High
J7.3
CLKX
SCLK
In
None
ADS1248 SPI clock
J7.4
DGND
DGND
In/Out
None
Digital ground
J7.5
CLKR
Unused
J7.6
GPIO1
MR
In
High
Master reset
J7.7
FSX
Unused
J7.8
GPIO2
Unused
J7.9
FSR
DRDY
Out
None
J7.10
DGND
DGND
In/Out
None
Digital ground
J7.11
DX
DIN
In
None
ADS1248 SPI data in
J7.12
GPIO3
PWRSEL
In
High
Selects
±2.5V or +5V
supply
J7.13
DR
DOUT/DRDY
Out
None
ADS1248 data out
J7.14
GPIO4
Unused
J7.15
INT
DRDY
Out
None
4
ADS1148EVM, ADS1248EVM, ADS1148EVM-PDK, and ADS1248EVM-PDK
SBAU142B
– April 2009 – Revised May 2011
Submit Documentation Feedback
Copyright
© 2009–2011, Texas Instruments Incorporated


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