18

Advance Information

ATA-Disk Module

SST58SM008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192

SST58LM008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192

©2001 Silicon Storage Technology, Inc.

S71193-01-000

9/01

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3.1.2.11 Drive Address Register (Read Only)

This register contains the inverted drive select and head select addresses of the currently selected drive. The bits

in this register are as follows:

Bit 7

This bit is HiZ.

Bit 6 (-WTG) This bit is 0 when a Write operation is in progress, otherwise, it is 1.

Bit 5 (-HS3)

This bit is the negation of bit 3 in the Drive/Head register.

Bit 4 (-HS2)

This bit is the negation of bit 2 in the Drive/Head register.

Bit 3 (-HS1)

This bit is the negation of bit 1 in the Drive/Head register.

Bit 2 (-HS0

This bit is the negation of bit 0 in the Drive/Head register.

Bit 1 (-DS1)

This bit is 0 when drive 1 is active and selected.

Bit 0 (-DS0)

This bit is 0 when drive 0 is active and selected.

3.1.2.12 Command Register (Write Only)

This register contains the command code being sent to the drive. Command execution begins immediately after

this register is written. The executable commands, the command codes, and the necessary parameters for each

command are listed in Table 3-2.

D7

D6

D5

D4

D3

D2

D1

D0

HiZ

-WTG

-HS3

-HS2

-HS1

-HS0

-DS1

-DS0